Other Parts Discussed in Thread: AFE7950EVM
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。
器件型号: AFE7950EVM
大家好,我在前面的问题中已经提到过,我们尝试使用 Latte 的(1G BW 设计)对 AFE 进行编程。 我们能够顺利获得射频。 当我们使用 Latte 生成的日志文件从 PC 执行此操作时、便能够像这样正确地在 NCO 处获取射频
但是、当我们将射频从 NCO 移出、然后频谱变得糟糕时、不需要的信号会从中心频率到达+/- 375MHz。 随着本底噪声也在变化。 我们不确定为什么会发生这些事情。

我将从 Latte 创建的 AFE 脚本和日志文件附加到您的参考中。 请告诉我们这一问题的含义。 谢谢你。
Afe79xxPg1.txt LMKCommands.txt AFECommands.txt
sysParams=AFE.systemParams
sysParams.__init__();sysParams.chipVersion=chipVersion
setupParams.skipFpga = 1 # setup FPGA (TSW14J56) using HSDC Pro
############## Top Level ##############
sysParams.FRef = 500 #404.2#500
sysParams.FadcRx = 3000 #2425.2 #3000
sysParams.FadcFb = 3000 #2425.2 #3000
sysParams.Fdac = 3000*4 #2425.2*4 # 3000*4
sysParams.externalClockRx=False
sysParams.externalClockTx=False
sysParams.RRFMode = 5 # RRF 0: 4T4R2F FDD Mode
sysParams.enableDacInterleavedMode=False
############## Digital Chain ##############
##### RX #####
sysParams.rxEnable = [True,False,False,False]
sysParams.ddcFactorRx = [2]*4 #DDC decimation factor for RX A, B, C and D
sysParams.rxNco0 = [[3750,3750], #Band0, Band1 for RXA
[9750,9750], #Band0, Band1 for RXB
[9750,9750], #Band0, Band1 for RXC
[9750,9750]] #Band0, Band1 for RXD
##### FB #####
sysParams.ddcFactorFb = [3]*2 #DDC decimation factor for FB 1 and 2
sysParams.fbNco0 = [9750,9750] #Band0 for FB1 and FB2
sysParams.fbEnable = [False,False]
##### TX #####
sysParams.txEnable = [True,False,False,False]
sysParams.ducFactorTx = [8]*4 #DUC interpolation factor for TX A, B, C and D
sysParams.txNco0 = [[3750,3750], #Band0, Band1 for TXA
[9750,9750], #Band0, Band1 for TXB
[9750,9750], #Band0, Band1 for TXC
[9750,9750]] #Band0, Band1 for TXD
############## JESD ##############
##### ADC-JESD #####
sysParams.jesdSystemMode= [3,3]
#SystemMode 0: 2R1F-FDD ; rx1-rx2-fb -fb
#SystemMode 1: 1R1F-FDD ; rx -rx -fb -fb
#SystemMode 2: 2R-FDD ; rx1-rx1-rx2-rx2
#SystemMode 3: 1R ; rx -rx -rx -rx
#SystemMode 4: 1F ; fb -fb- fb -fb
#SystemMode 5: 1R1F-TDD ; rx/fb-rx/fb-rx/fb-rx/fb
sysParams.jesdTxProtocol= [2,2] # 0 - 8b/10b encoding; 2 - 64b/66b encoding
sysParams.LMFSHdRx = ["42220"]*4
# The 2nd and 4th are valid only for jesdSystemMode values in (0,2).
# For other modes, select 4 converter modes for 1st and 3rd.
sysParams.LMFSHdFb = ["22210","22210"]
sysParams.rxJesdTxScr = [False,False,False,False]
sysParams.fbJesdTxScr = [False,False]
sysParams.rxJesdTxK = [1,1,1,1]
sysParams.fbJesdTxK = [1,1]
sysParams.serdesTxLanePolarity =[1,1,0,0,1,1,0,0]
sysParams.jesdTxLaneMux = [1,0,3,2,4,5,6,7] # Enter which lanes you want in each location.
# For example, if you want to exchange the first two lines of each 2T,
# this should be [[1,0,2,3],[5,4,6,7]]
##### DAC-JESD #####
sysParams.jesdRxProtocol= [2,2]
sysParams.LMFSHdTx = ["42220"]*4
sysParams.serdesRxLanePolarity=[1,1,1,1,0,0,0,0]
sysParams.jesdRxLaneMux = [1,0,3,2,4,5,6,7] # Enter which lanes you want in each location.
# For example, if you want to exchange the first two lines of each 2R
# this should be [[1,0,2,3],[5,4,6,7]]
sysParams.jesdRxRbd = [4, 4]
sysParams.jesdRxScr = [False,False,False,False]
sysParams.jesdRxK = [1,1,1,1]
##### JESD Common #####
sysParams.jesdABLvdsSync= True
sysParams.jesdCDLvdsSync= True
sysParams.syncLoopBack = True #JESD Sync signal is connected to FPGA
############## GPIO ##############
sysParams.gpioMapping = {
'H8': 'ADC_SYNC0',
'H7': 'ADC_SYNC1',
'N8': 'ADC_SYNC2',
'N7': 'ADC_SYNC3',
'H9': 'DAC_SYNC0',
'G9': 'DAC_SYNC1',
'N9': 'DAC_SYNC2',
'P9': 'DAC_SYNC3',
'P14': 'GLOBAL_PDN',
'K14': 'FBABTDD',
'R6': 'FBCDTDD',
'H15': ['TXATDD','TXBTDD'],
'V5': ['TXCTDD','TXDTDD'],
'E7': ['RXATDD','RXBTDD'],
'R15': ['RXCTDD','RXDTDD']}
############## LMK Params ##############
lmkParams.pllEn = False
lmkParams.inputClk = 1500 #1212.6 #1500 # Valid only when lmkParams.pllEn = False
lmkParams.lmkFrefClk = True
setupParams.fpgaRefClk = 187.5 #151.575 #187.5 # Should be equal to LaneRate/40 for TSW14J56
############## Logging ##############
logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\Afe79xxPg1.txt")
logDumpInst.logFormat=0x01# to generate format5 file
logDumpInst.rewriteFile=1
lmk.logClassInst =logDumpInst
logDumpInst.rewriteFileFormat4=1
device.optimizeWrites=0
device.rawWriteLogEn=1
lmk.rawWriteLogEn = 1
device.delay_time = 0
#-------------------------------------------------------------------------------------------------#
sysParams.ncoFreqMode = "FCW" ##"1KHz" ##"FCW"
setupParams.skipLmk = False
AFE.initializeConfig()
lmkParams.sysrefFreq = AFE.systemStatus.sysrefFreq
lmkParams.lmkPulseSysrefMode = False
AFE.LMK.lmkConfig()