[参考译文] AFE7921：AFE7921链路不稳定

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Other Parts Discussed in Thread: AFE7921

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https://e2e.ti.com/support/rf-microwave-group/rf-microwave/f/rf-microwave-forum/1417423/afe7921-afe7921-link-not-stably

器件型号：AFE7921

工具与软件：

您好！

我们使用的 AFE7921有一些问题。

过去,我们使用200m 带宽,我们的 AFE7921配置如下,我们的 sysref 为3.84MHz、JESD TX 和 JESD RX 速率为9.8304Gbps、它可以稳定地工作。

sysParams。 FRef = 245.76

sysParams。 FadcRx = 2949.1

sysParams。 Fdac = 2949.12*3.

sysParams.ddcFactorRx =[12、12、12]

sysParams.ducFactorTx =[36、36、36、36]

现在我们使用100M 带宽来节省 FPGA 资源和功耗、sysref 为3.84MHz、我们的 AFE7921配置如下所示、clk 和 adc/dac 速率相同、DDC 值加倍。 JESD TX 和 JESD RX 的速率为4.9152Gbps、但这种情况下不能稳定运行。有时链路断开、有时链路接通、然后链路断开切换。

sysParams。 FRef = 245.76

sysParams。 FadcRx = 2949.1

sysParams。 Fdac = 2949.12*3.

sysParams.ddcFactorRx =[24、24、24、24]

sysParams.ducFactorTx =[72、72、72、72、72]

我们还尝试更改 ADC/DAC 速率、AFE7921配置如下所示。但这种现象是一样的,它也不是稳定的。有时链接断开,有时链接接通,然后链接断开切换。

sysParams。 FRef = 245.76

sysParams。 FadcRx = 1474.56

sysParams。 Fdac = 1474.56*3.

sysParams.ddcFactorRx =[12、12、12]

sysParams.ducFactorTx =[36、36、36、36]

11 个月前

0 admin 11 个月前

TI__Guru**** 2345860 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

尊敬的陈先生：

这与要求使用新 Latte 版本的其他 E2E 有任何关系吗？ https://e2e.ti.com/support/rf-microwave-group/rf-microwave/f/rf-microwave-forum/1415771/afe7921-some-question-about-latte-and-afe79xxevm_-gui-version

如果是、请尝试使用最新版本的 AFE79xx Latte。另外、请尝试设置 FadcRx = 2949.12、而不是2949.1。

如果这些修复程序不起作用、请向我发送您的配置脚本(如果您愿意、我们可以通过专用 E2E 消息执行此操作)、我可以看一下我的设置。

谢谢！

Aman

0 admin 11 个月前

TI__Guru**** 2345860 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好！

我的副本丢失了2、FadcRx 是2949.12、当我复制时丢失了2

我们的配置如下所示

'''
Validation :  AFE79xx Library Version 
				v1.67, v1.74
Case			RX					TX						   FB						CLK					Notes
----	-----------------	  -----------------			-----------------			-----------			------------
1		245.76Msps, 24410     491.52Msps, 44210			491.52Msps, 22210			FADC=2949.12M       DAC in interleaved mode
		SerDes=9830.4Mbps     SerDes=9830.4Mbps			SerDes=9830.4Mbps			FDAC=8847.36M
		PLL0, NCO=3500M		  PLL0, NCO=3500M			NCO=3500M                   REF=491.52M
		
2		245.76Msps, 24410     491.52Msps, 44210			491.52Msps, 22210			FADC=2949.12M       DAC in straight mode
		SerDes=9830.4Mbps     SerDes=9830.4Mbps			SerDes=9830.4Mbps			FDAC=8847.36M
		PLL0, NCO=3500M		  PLL0, NCO=3500M			NCO=3500M                   REF=491.52M
'''
setupParams.skipFpga 				= 1
sysParams							=	AFE.systemParams
setupParams.fpgaRefClk 				= 122.88	
AFE.systemStatus.loadTrims			= 1

sysParams.FRef                    	= 122.88
sysParams.FadcRx                  	= 1474.56
sysParams.FadcFb				  	= 1474.56
sysParams.Fdac                    	= 1474.56*3

sysParams.enableDacInterleavedMode	= True 					#DAC interleave mode to save power consumption. Fs/2 - Fin spur occurs

sysParams.modeTdd 					= 0		
										# 0- Single TDD Pin for all Channels
										# 1- Separate Control for 2T/2R/1F
										# 2- Separate Control for 1T/1R/1F			

sysParams.topLevelSystemMode		= 'StaticTDDMode'
sysParams.RRFMode 					= 0   #4T4R2F FDD mode
sysParams.jesdSystemMode			= [3,3]
										#SystemMode 0:	2R1F-FDD						; rx1-rx2-fb-fb
										#SystemMode 1:	1R1F-FDD						; rx1-rx1-fb-fb
										#SystemMode 2:	2R-FDD							; rx1-rx1-rx2-rx2
										#SystemMode 3:	1R								; rx1-rx1-rx1-rx1
										#SystemMode 4:	1F								; fb-fb-fb-fb
										#SystemMode 5:	1R1F-TDD						; rx1/fb-rx1/fb-rx1/fb-rx1/fb
										#SystemMode 8:	1R1F-TDD 1R-FDD	(FB-2Lanes)(RX1 RX2 interchanged)		; rx2/fb-rx2/fb-rx1-rx1


sysParams.jesdLoopbackEn			= 0 #Make it 1 to Enable the JESDTX to JESDRX internal loopback
sysParams.LMFSHdRx                	=['24410', '24410', '24410', '24410']	
										# The 2nd and 4th are valid only for jesdSystemMode values in (2,6,7,8). For other modes, select 4 converter modes for 1st and 3rd.
sysParams.LMFSHdFb                	= ["24410","24410"]
sysParams.LMFSHdTx                	= ["24410","24410","24410","24410"]
sysParams.jesdTxProtocol            = [0,0]
sysParams.jesdRxProtocol            = [0,0]
sysParams.serdesFirmware			= True 		# If you want to lead any firmware, please speify the path here. Otherwise it will not write any firmware
sysParams.jesdTxLaneMux				= [0,1,4,5,2,3,6,7]	
												# Enter which lanes you want in each location. 
												# Note that across 2T Mux is not possible in 0.5.
												# For example, if you want to exchange the first two lines of each 2T, this should be [[1,0,2,3],[5,4,6,7]]
sysParams.jesdRxLaneMux				= [0,1,4,5,2,3,6,7]	
												# Enter which lanes you want in each location.
												# Note that across 2R Mux is not possible in 0.5.
												# For example, if you want to exchange the first two lines of each 2R, this should be [[1,0,2,3],[5,4,6,7]]

sysParams.jesdRxRbd					= [4, 4]

sysParams.rxJesdTxScr				= [True,True,True,True]
sysParams.fbJesdTxScr				= [False,False]
sysParams.jesdRxScr					= [True,True,True,True]

sysParams.rxJesdTxK					= [32,32,32,32]
sysParams.fbJesdTxK					= [32,32]
sysParams.jesdRxK					= [16,16,16,16]

sysParams.ncoFreqMode 				= "1KHz"
	
sysParams.txNco0					= 	[[1950,2600],		#Band0, Band1 for TxA for NCO0
										[1747.5,2600],        #Band0, Band1 for TxB for NCO0
										[2535,2600],        #Band0, Band1 for TxC for NCO0
										[3400,2600]]        #Band0, Band1 for TxD for NCO0

sysParams.rxNco0					= 	[[2140,2600],		#Band0, Band1 for RxA for NCO0
										[1842.5,2600],        #Band0, Band1 for RxB for NCO0
										[2655,2600],        #Band0, Band1 for RxC for NCO0
										[3400,2600]]        #Band0, Band1 for RxD for NCO0

sysParams.fbNco0					= 	[2200,2200]			#FBA, FBC for NCO0
sysParams.fbNco1					= 	[2200,2200]			#FBA, FBC for NCO1
sysParams.fbNco2					= 	[2200,2200]			#FBA, FBC for NCO2
sysParams.fbNco3					= 	[2200,2200]			#FBA, FBC for NCO3

sysParams.numBandsRx				= [0]*4					# 0 for single, 1 for dual
sysParams.numBandsFb				= [0,0]				
sysParams.numBandsTx				= [0,0,0,0]

sysParams.ddcFactorRx             	= [12,12,12,12]			# DDC decimation factor for RX A, B, C and D
sysParams.ddcFactorFb             	= [6,6]
sysParams.ducFactorTx             	= [36,36,36,36]

AFE.systemStatus.loadTrims			=1

## The following parameters sets up the LMK04828 clocking schemes
lmkParams.pllEn						=	True#False
lmkParams.inputClk					=	1474.56#737.28
lmkParams.sysrefFreq				=	2949.12/1024
lmkParams.lmkFrefClk				=	True

## The following parameters sets up the register and macro dumps
logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\AFE7921_config_24410_1_12288.txt")
logDumpInst.logFormat				= 0x0f
logDumpInst.rewriteFile				= 1
logDumpInst.rewriteFileFormat4		= 1
device.optimizeWrites				= 0
device.rawWriteLogEn				= 1

## The following parameters sets up the SYNCIN and SYNCOUT to interface with the TSW14J57
sysParams.jesdABLvdsSync			= 1
sysParams.jesdCDLvdsSync			= 1
sysParams.rxJesdTxSyncMux			= [0,0,0,0]
sysParams.fbJesdTxSyncMux			= [0,0]
sysParams.jesdRxSyncMux				= [0,0,0,0]		#[0,0,1,1]
sysParams.syncLoopBack				= True

# ## The following parameters sets up the AGC
# sysParams.agcParams[0].agcMode = 1 ##internal AGC
# sysParams.agcParams[0].gpioRstEnable = 0 ##disable GPIO based reset to AGC detector 
# sysParams.agcParams[0].atken = [0, 1, 0] ##enable big and small step attack
# sysParams.agcParams[0].decayen = [0,1,0] ##enable big and small step decay
# sysParams.agcParams[0].atksize = [2,1,0] ## bigs step = 2dB, small step = 1dB
# sysParams.agcParams[0].decaysize = [2,1,0] ##big step = 2dB, small step = 1dB
# sysParams.agcParams[0].atkthreshold = [-1, -2, -14] ##attack threshold
# sysParams.agcParams[0].decaythreshold = [-14, -6, -20] ##decay threshold
# sysParams.agcParams[0].atkwinlength = [170, 170] ## detector time constant expressed inn absolute time in ns. 
# sysParams.agcParams[0].decaywinlength = 87380 ##detector time constant expressed in absolute time in ns. All detectors use the same value for decay time constant
# sysParams.agcParams[0].atkNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
# sysParams.agcParams[0].decayNumHitsAbs = [100,100] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
# sysParams.agcParams[0].minDsaAttn = 0 ##minimum DSA attenuation used by AGC
# sysParams.agcParams[0].maxDsaAttn = 22 ##maximum DSA attenuation used by AGC
# sysParams.agcParams[0].totalGainRange = 22 ##total gain range used by ALC for gain compensation
# sysParams.agcParams[0].minAttnAlc = 0 ##minimum attenuation used by ALC for compensation when useMinAttnAgc = 0
# sysParams.agcParams[0].useMinAttnAgc = 1 ##enable ALC to use minimum attenuation from AGC for which compensation is required.
# sysParams.agcParams[0].alcEn = 1
# sysParams.agcParams[0].alcMode = 0 ##floating point DGC
# sysParams.agcParams[0].fltPtMode = 0 ##if exponent > 0, dont send MSB
# sysParams.agcParams[0].fltPtFmt = 1 ##3 bit exponent


## The following parameters sets up the GPIOs
sysParams.gpioMapping={
		'H8': 'ADC_SYNC0',
		'H7': 'ADC_SYNC1',
		'N8': 'ADC_SYNC2',
		'N7': 'ADC_SYNC3',
		'H9': 'DAC_SYNC0',
		'G9': 'DAC_SYNC1',
		'N9': 'DAC_SYNC2',
		'P9': 'DAC_SYNC3',
		'P14': 'GLOBAL_PDN',
		'K14': 'FBABTDD',
		'R6': 'FBCDTDD',
		'H15': ['TXATDD','TXBTDD'],
		'V5': ['TXCTDD','TXDTDD'],
		'E7': ['RXATDD','RXBTDD'],
		'R15': ['RXCTDD','RXDTDD']}
		
#AFE.systemParams.papParams[0]['enable'] = True
#AFE.systemParams.papParams[1]['enable'] = True
#AFE.systemParams.papParams[2]['enable'] = True
#AFE.systemParams.papParams[3]['enable'] = True
		

## Initiates LMK04828 and AFE79xx Bring-up
AFE.deviceBringup()

AFE.TOP.overrideTdd(15,3,15)