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器件型号：CC1352P Thread 中讨论的其他器件： SysConfig
您好！
我尝试在 rfWsnNodeExtFlashOadClient_CC1352P_4_LAUNCHXL_tirtos7_ticlang 示例中将 GPRAM 用作 RAM。
我尝试遵循 SDK 用户指南中有关如何执行该操作的说明、但在 OAD 片外示例中、我没有 CCFG 文件、因为 BIM 项目具有该文件。
这是我的 CMD 文件：
/******************************************************************************
@file CC13X2_CC26X2_TIRTOS7_OAD.cmd
@brief Over the Air Download Linker Command File
Group: CMCU LPRF
Target Device: cc13xx_cc26xx
******************************************************************************
Copyright (c) 2017-2022, Texas Instruments Incorporated
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************
*****************************************************************************/
--stack_size=5192 /* C stack is also used for ISR stack */
HEAPSIZE = 0x4000; /* Size of heap buffer used by HeapMem */
/* Retain interrupt vector table variable */
--retain=g_pfnVectors
/* Override default entry point. */
--entry_point ResetISR
/* Allow main() to take args */
--args 0x8
/* Suppress warnings and errors: */
/* - 10063: Warning about entry point not being _c_int00 */
/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */
/* files compiled using Keil (ARM compiler) */
--diag_suppress=10063,16011,16012
/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* --heap_size=0 */
/* --stack_size=256 */
/* --library=rtsv7M3_T_le_eabi.lib */
/* The starting address of the application. Normally the interrupt vectors */
/* must be located at the beginning of the application. */
#ifdef OAD_ONCHIP
#ifdef OAD_P_APP
#define IMG_HDR 0x44000
#define FLASH_BASE IMG_HDR + 0xA8
#define FLASH_SIZE 0x56000 - FLASH_BASE
#else
#define IMG_HDR 0x0
#define FLASH_BASE 0xA8
#define FLASH_SIZE 0x40000 - FLASH_BASE
#endif
#else
#define IMG_HDR 0x0
#define FLASH_BASE 0xA8
#define FLASH_SIZE 0x56000 - FLASH_BASE
#endif
#define RAM_BASE 0x20000000
#define RAM_SIZE 0x14000
#define GPRAM_BASE 0x11000000
#define GPRAM_SIZE 0x2000
#define PAGE_SIZE 0x2000
/* System memory map */
MEMORY
{
FLASH_IMG_HDR (RX) : origin = IMG_HDR, length = 0xA8
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE
/* Application uses internal RAM for data */
SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE
/* Application can use GPRAM region as RAM if cache is disabled in the CCFG
(DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) */
GPRAM (RWX): origin = GPRAM_BASE, length = GPRAM_SIZE
}
/* Section allocation in memory */
SECTIONS
{
GROUP > FLASH_IMG_HDR
{
.image_header
}
.resetVecs : > FLASH_BASE LOAD_START(prgEntryAddr)
.intvecs : > FLASH_BASE
.text : >> FLASH
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
.const : >> FLASH
.constdata : >> FLASH
.rodata : >> FLASH
.binit : > FLASH
.cinit : > FLASH LOAD_END(flashEndAddr)
.pinit : > FLASH
.init_array : > FLASH
.emb_text : >> FLASH
//.ccfg : > FLASH (HIGH)
.vtable : > SRAM
.vtable_ram : > SRAM
vtable_ram : > SRAM
.data : > SRAM LOAD_START(ramStartHere)
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM (HIGH) LOAD_START(heapEnd)
.nonretenvar : > SRAM
/* Heap buffer used by HeapMem */
.priheap : {
__primary_heap_start__ = .;
. += HEAPSIZE;
__primary_heap_end__ = .;
} > SRAM align 8
.gpram : > GPRAM
}
--symbol_map __TI_STACK_SIZE=__STACK_SIZE
--symbol_map __TI_STACK_BASE=__stack
-u_c_int00
--retain "*(.resetVecs)"
--retain "*(.vecs)"
SECTIONS
{
.resetVecs: load > 0
.vecs: load > 0x20000000, type = NOLOAD
}
当我单击"Device Configuration"时、我的 SysConfig 文件如下所示：
我在 cmd 文件中看到此注释，但我不确定应该将此定义放在哪里，我应该将其放在 BIM 项目中的 ccfg.c 文件中吗？
/* Application can use GPRAM region as RAM if cache is disabled in the CCFG
(DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) */
