TMS320F28335: FLASH烧录

您好，

已经收到了您的案例，调查需要些时间，感谢您的耐心等待。

/**********************************************************************
* File: f28335_nonBIOS_flash.cmd -- Linker command file for non-DSP/BIOS
* code with DSP in Boot to Flash boot mode.
*
* History: 09/18/07 - original (D. Alter)
**********************************************************************/

MEMORY
{

PAGE 0: /* Program Memory */
L0123SARAM : origin = 0x008000, length = 0x005FFF /* SARAM, L0 through L3 combined. CSM secure */
//L0123SARAM : origin = 0x010900, length = 0x0106FF /* SARAM, L0 through L3 combined. CSM secure */
FLASH_ABCDEFGH : origin = 0x300000, length = 0x03FF80 /* On-chip FLASH */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASH Sector A. Reserved when CSM is in use. */
BEGIN_FLASH : origin = 0x33FFF6, length = 0x000002 /* Part of FLASH Sector A. Used for "Jump to flash" bootloader mode. */
PASSWORDS : origin = 0x33FFF8, length = 0x000008 /* Part of FLASH Sector A. CSM password locations. */
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */
OTP : origin = 0x380400, length = 0x000400 /* 1Kw OTP */
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* Part of Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* Part of Boot ROM */
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* Part of Boot ROM */
BOOTROM : origin = 0x3FF27C, length = 0x000D44 /* 8Kw Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of Boot ROM */

PAGE 1 : /* Data Memory */
M0SARAM : origin = 0x000000, length = 0x000400 /* 1Kw M0 SARAM */
/* M1SARAM : origin = 0x000400, length = 0x000400 /* 1Kw M1 SARAM */
M1SARAM : origin = 0x000400, length = 0x000400 /* 1Kw M1 SARAM */
L4SARAM : origin = 0x00E000, length = 0x001CFF /* 4Kw L4 SARAM, DMA accessible */
//L4SARAM : origin = 0x00C000, length = 0x002CFF /* 4Kw L4 SARAM, DMA accessible */
L5SARAM : origin = 0x00FD00, length = 0x0000ff /* 4Kw L5 SARAM, DMA accessible */
L6SARAM : origin = 0x00FE00, length = 0x000AFF /* 4Kw L6 SARAM, DMA accessible, 1 WS prog access */
L7SARAM : origin = 0x010900, length = 0x0106FF /* 4Kw L7 SARAM, DMA accessible 1 WS prog access */

}
//PAGE 0: /* Program Memory */
// L0123SARAM : origin = 0x008000, length = 0x005900//ԭʼ /* SARAM, L0 through L3 combined. CSM secure */
//L0123SARAM : origin = 0x006000, length = 0x007900//1117 /* SARAM, L0 through L3 combined. CSM secure */
// L0123SARAM : origin = 0x008000, length = 0x008000 /* SARAM, L0 through L3 combined. CSM secure */
// FLASH_ABCDEFGH : origin = 0x300000, length = 0x03FF80//ԭʼ /* On-chip FLASH */
// CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASH Sector A. Reserved when CSM is in use. */
// BEGIN_FLASH : origin = 0x33FFF6, length = 0x000002 /* Part of FLASH Sector A. Used for "Jump to flash" bootloader mode. */
// PASSWORDS : origin = 0x33FFF8, length = 0x000008 /* Part of FLASH Sector A. CSM password locations. */
// ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */
// OTP : origin = 0x380400, length = 0x000400 /* 1Kw OTP */
// IQTABLES : origin = 0x3FE000, length = 0x000B50 /* Part of Boot ROM */
// IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* Part of Boot ROM */
// FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* Part of Boot ROM */
// BOOTROM : origin = 0x3FF27C, length = 0x000D44 /* 8Kw Boot ROM */
// RESET : origin = 0x3FFFC0, length = 0x000002 /* part of Boot ROM */

//PAGE 1 : /* Data Memory */
// M0SARAM : origin = 0x000000, length = 0x000400 /* 1Kw M0 SARAM */
/* M1SARAM : origin = 0x000400, length = 0x000400 /* 1Kw M1 SARAM */
// M1SARAM : origin = 0x000400, length = 0x000400 /* 1Kw M1 SARAM */
// L4SARAM : origin = 0x010000, length = 0x001CFF
//L4SARAM : origin = 0x00D900, length = 0x001CFF // /* 4Kw L4 SARAM, DMA accessible */
//L4SARAM : origin = 0x00C000, length = 0x002CFF /* 4Kw L4 SARAM, DMA accessible */
//L5SARAM : origin = 0x00F600, length = 0x0007ff // /* 4Kw L5 SARAM, DMA accessible */
//L6SARAM : origin = 0x00FE00, length = 0x000AFF // /* 4Kw L6 SARAM, DMA accessible, 1 WS prog access */
//L7SARAM : origin = 0x010900, length = 0x0106FF // /* 4Kw L7 SARAM, DMA accessible 1 WS prog access */
// L5SARAM : origin = 0x011D00, length = 0x0007ff /* 4Kw L5 SARAM, DMA accessible */
// L6SARAM : origin = 0x012500, length = 0x000AFF /* 4Kw L6 SARAM, DMA accessible, 1 WS prog access */
// L7SARAM : origin = 0x013000, length = 0x0106FF /* 4Kw L7 SARAM, DMA accessible 1 WS prog access */

SECTIONS
{
/*** Code Security Password Locations ***/
passwords : > PASSWORDS, PAGE = 0 /* Used by file passwords.asm */
csm_rsvd : > CSM_RSVD, PAGE = 0 /* Used by file passwords.asm */
/*** User Defined Sections ***/
codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */
wddisable : > FLASH_ABCDEFGH, PAGE = 0
copysections : > FLASH_ABCDEFGH, PAGE = 0
/* Allocate IQ math areas: */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
/*** Uninitialized Sections ***/
.stack : > M0SARAM PAGE = 1
//.ebss : > L0123SARAM PAGE = 0
.ebss : > L4SARAM PAGE = 1
.esysmem : > M1SARAM PAGE = 1
/*** Initialized Sections ***/
.cinit : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_cinit_loadstart),
RUN_START(_cinit_runstart),
SIZE(_cinit_size)

.const : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_const_loadstart),
RUN_START(_const_runstart),
SIZE(_const_size)

.econst : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_econst_loadstart),
RUN_START(_econst_runstart),
SIZE(_econst_size)

.pinit : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_pinit_loadstart),
RUN_START(_pinit_runstart),
SIZE(_pinit_size)

.switch : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_switch_loadstart),
RUN_START(_switch_runstart),
SIZE(_switch_size)

.text : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* can be ROM */
RUN = L0123SARAM, PAGE = 0 /* must be CSM secured RAM */
LOAD_START(_text_loadstart),
RUN_START(_text_runstart),
SIZE(_text_size)
ramfuncs : LOAD = FLASH_ABCDEFGH, PAGE = 0 /* Should be Flash */
RUN = L0123SARAM, PAGE = 0 /* Must be CSM secured RAM */
LOAD_START(_ramfuncs_loadstart),
RUN_START(_ramfuncs_runstart)
SIZE(_ramfuncs_size)
}

/******************* end of file ************************/

上边是烧录时使用的CMD代码

您好

我对上述问题不清楚。你的意思是不是每次通过JTAG将.out文件加载到设备时都不会正确？

我最初的想法是，如果几乎所有的闪存都被使用，那么总擦除时间将是最大的，每个扇区最多可达15秒。CCS/Uniflash应自动遵守此最大时间；但如果客户自己调用API（比如引导程序编程闪存），他们可能没有使用每个扇区的最大数量，这可能会导致设备无法正确擦除。

如果我正确理解了这个问题，请告诉我。

您好

客户是否尝试过CCS及其闪存插件的相同实验？我想知道Uniflash的某些设置是否配置不正确，无法在闪存刻录后运行程序。如果重置后设备工作正常，那么我认为闪存编程正确；这可能不是闪光问题。

如果可能的话，请通过CCS/JTAG告诉我上述情况。