现在有一个很奇怪的问题,我用的DSP是TMS320F28335,写了一段ADC的测试程序,发现这样一个问题:当我把AdcRegs.ADCTRL3.bit.ADCCLKPS设置为1的时候ADC工作正常,当是当我把AdcRegs.ADCTRL3.bit.ADCCLKPS设为10的时候ADC工作不正常(采到的结果偏差很大),请高人解惑
附:
void ADCInit(void)
{
Uint16 i;
AdcRegs.ADCTRL1.bit.RESET=1;
for(i=0;i<100;i++);
ADC_cal();
//=====================================================
AdcRegs.ADCTRL1.bit.SUSMOD=3; //3:仿真器停立即停
AdcRegs.ADCTRL1.bit.ACQ_PS=0xf; //(0-15)采集窗大小
AdcRegs.ADCTRL1.bit.CPS=0; //Core clock prescaler.
AdcRegs.ADCTRL1.bit.CONT_RUN=1; //1:Continuous conversion mode.
AdcRegs.ADCTRL1.bit.SEQ_OVRD=0; //0:Disabled Sequencer override
AdcRegs.ADCTRL1.bit.SEQ_CASC=1; //Cascaded(级联) sequencer operation.
//=====================================================
AdcRegs.ADCTRL2.bit.EPWM_SOCB_SEQ=0;//ePWM SOCB enable
AdcRegs.ADCTRL2.bit.RST_SEQ1=1; //1:reset sequencer
for(i=0;i<100;i++);
AdcRegs.ADCTRL2.bit.SOC_SEQ1=0; //1:启动序列1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1=1; //Interrupt request by INT_SEQ1 is disabled.
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1=0;
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1=0;//SEQ1 cannot be started by ePWMx SOCA trigger.
AdcRegs.ADCTRL2.bit.EXT_SOC_SEQ1=0;
AdcRegs.ADCTRL2.bit.RST_SEQ2=1; //resets SEQ2
for(i=0;i<100;i++);
AdcRegs.ADCTRL2.bit.SOC_SEQ2=0; //1:启动序列2(Starts SEQ2 from currently stopped position)
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ2=1; //Interrupt request by INT_SEQ2 is enabled
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ2=0;
AdcRegs.ADCTRL2.bit.EPWM_SOCB_SEQ2=0;//SEQ2 cannot be started by ePWMx SOCB trigger
AdcRegs.ADCTRL3.bit.ADCBGRFDN=3; //The bandgap and reference circuitry is powered up
AdcRegs.ADCTRL3.bit.ADCPWDN=1;
AdcRegs.ADCTRL3.bit.ADCCLKPS=1; //(0-15) n HSPCLK/[2n*(ADCTRL1[7] + 1)](n!=0) 分频设置
AdcRegs.ADCTRL3.bit.SMODE_SEL=0; //Sequential sampling mode is selected.
AdcRegs.ADCMAXCONV.bit.MAX_CONV1=5;
//AdcRegs.ADCASEQSR.all= //自动序列状态寄存器
//AdcRegs.ADCST.all= //ADC状态寄存器
AdcRegs.ADCREFSEL.bit.REF_SEL=0; //Internal reference selected (default)
AdcRegs.ADCOFFTRIM.bit.OFFSET_TRIM=0;
AdcRegs.ADCCHSELSEQ1.bit.CONV00=0;
AdcRegs.ADCCHSELSEQ1.bit.CONV01=0;
AdcRegs.ADCCHSELSEQ1.bit.CONV02=0;
AdcRegs.ADCCHSELSEQ1.bit.CONV03=0;
AdcRegs.ADCCHSELSEQ2.bit.CONV04=0;
AdcRegs.ADCCHSELSEQ2.bit.CONV05=0;
AdcRegs.ADCCHSELSEQ2.bit.CONV06=0;
AdcRegs.ADCCHSELSEQ2.bit.CONV07=0;
AdcRegs.ADCCHSELSEQ3.bit.CONV08=0;
AdcRegs.ADCCHSELSEQ3.bit.CONV09=0;
AdcRegs.ADCCHSELSEQ3.bit.CONV10=0;
AdcRegs.ADCCHSELSEQ3.bit.CONV11=0;
AdcRegs.ADCCHSELSEQ4.bit.CONV12=0;
AdcRegs.ADCCHSELSEQ4.bit.CONV13=0;
AdcRegs.ADCCHSELSEQ4.bit.CONV14=0;
AdcRegs.ADCCHSELSEQ4.bit.CONV15=0;
// AdcRegs.ADCRESULT0
}