28335 打算使用sys/bios SCIfifo中断接收数据，但一直没有办法进入中断服务函数，程序很简单，可能是哪里没有注意到，调试很久了没有结果，求帮忙解答

jinkui wang

正常的任务能运行，但是fifo中断函数没办法执行，配置情况下

#include <xdc/std.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>
#include <xdc/runtime/log.h>
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
#include <xdc/cfg/global.h>
void func_tsk0(void);
void func_tsk1(void);
void sciaRxFifoIsr(void);

/*
 *  ======== main ========
 */
Int main()
{ 
    InitSysCtrl();
    DisableDog();
    InitSci();
    Task_Handle task;
    Error_Block eb;
    System_printf("enter main()\n");
    Error_init(&eb);
    task = Task_create(taskFxn, NULL, &eb);
    if (task == NULL) {
        System_printf("Task_create() failed!\n");
        BIOS_exit(0);
    }

    BIOS_start();    /* does not return */
    return(0);
}

void sciaRxFifoIsr(void)
{
	  System_printf("enter_isr\n");
	 while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
		    SciaRegs.SCITXBUF=0xff;     // Send data
	  ScicRegs.SCIFFRX.bit.RXFFOVRCLR=1;  // Clear Overflow flag
      ScicRegs.SCIFFRX.bit.RXFFINTCLR=1; 	// Clear Interrupt flag
}

void scia_fifo_init(void)
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =1;
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   SciaRegs.SCIHBAUD    =0x0001;  // 9600 baud @LSPCLK = 37.5MHz.
   SciaRegs.SCILBAUD    =0x00E7;
  // SciaRegs.SCIHBAUD    =0x0001;  // 9600 baud @LSPCLK = 25MHz.
  // SciaRegs.SCILBAUD    =0x0044;
//   SciaRegs.SCIHBAUD = 0x0000;
//   SciaRegs.SCILBAUD = SCI_PRD;
   SciaRegs.SCIFFTX.all=0xC028;
   SciaRegs.SCIFFRX.all=0x2070;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
}