If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
EPwm1Regs.CMPB = 80; // ISR trigger point EPwm1Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPB; // INT on CompareB-Up event EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT // EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every event
主函数中划线部分应该就是要跳转到中断函数吧，
下面这个是个中断函数吧，这部分主要是什么作用？谢谢！
;---------------------------------------------------------------------------------- ; FILE: BridgelessPFC-DPL-ISR.asm ; ; Description: BridgelessPFC-DPL-ISR.asm contains the ISR for the system ; It also contains the initailization routine for all the macros ; being used in the system both for CLA and C28x macros ; ; Revision/ Version: See BridgelessPFC-Main.c ;----------------------------------------------------------------------------------
;Gives peripheral addresses visibility in assembly .cdecls C,LIST,"PeripheralHeaderIncludes.h"
;include C header file - sets INCR_BUILD etc.(used in conditional builds) .cdecls C,NOLIST, "BridgelessPFC-Settings.h"
;Include files for the Power Library Maco's being used by the system .include "ADCDRV_1ch.asm" .include "PFC_BL_ICMD.asm" .include "PWMDRV_1ch_UpDwnCnt.asm"
;============================================================================= ; Digital Power library - Initailization Routine ;=============================================================================
; label to DP initialisation function .def _DPL_Init
;Execute Vloop every VoltCurrLoopExecRatio times, defined in BridgelessPFC-Settings.h file MOVW DP,#(VloopCtr) INC @VloopCtr CMP @VloopCtr,#VoltCurrLoopExecRatio B SKIP_VLOOP_CALC,LT
;Calculate Vrect MOVW DP, #_AdcResult ; load Data Page to read ADC results MOV ACC, @_AdcResult.ADCRESULT3<<12 ; ACC = Line SUB ACC, @_AdcResult.ADCRESULT4<<12 ; ACC = Line - Neutral B NegativeCycle, LEQ ; Branch to Negative Half Cycle PositiveCycle: ; Save Vrect .ref _Vrect MOVW DP, #_Vrect MOVL @_Vrect, ACC ; ePWM1 & ADC configuration MOVW DP, #_AdcRegs.ADCSOC1CTL ; load Data Page to read ADC results ; MOV @_AdcRegs.ADCSOC1CTL.bit.CHSEL, #2 ; Switch ADC to IpfcA current EALLOW MOV @_AdcRegs.ADCSOC1CTL, #10374 ; Switch ADC to IpfcA current EDIS MOVW DP, #_EPwm1Regs.AQCTLA ; load Data Page to read ePWM registers ; MOV @_EPwm1Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM1 on CompA-Up (enable switching) ; MOV @_EPwm1Regs.AQCTLA.bit.CAD, #2 ; SET ePWM1 on CompA-Down (enable switching) MOV @_EPwm1Regs.AQCTLA, #144 ; SET ePWM1 on CompA-Down, CLEAR CompA-Up (enable switching) MOVW DP, #_EPwm2Regs.AQCTLA ; load Data Page to read ePWM registers ; MOV @_EPwm2Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM2 on CompA-Up ; MOV @_EPwm2Regs.AQCTLA.bit.CAD, #1 ; CLEAR ePWM2 on CompA-Down (force low) MOV @_EPwm2Regs.AQCTLA, #80 ; CLEAR ePWM2 on CompA-Up/Down (force low) ; Check if near Zero crossing before forcing ePWM2 High ;SUB ACC, #100<<12 SUB ACC, #50<<12 B SkipPWM2Force, LT ; MOV @_EPwm2Regs.AQCTLA.bit.CAU, #2 ; SET ePWM2 on CompA-Up (force high) ; MOV @_EPwm2Regs.AQCTLA.bit.CAD, #2 ; SET ePWM2 on CompA-Down MOV @_EPwm2Regs.AQCTLA, #160 ; SET ePWM2 on CompA-Up/Down (force high) SkipPWM2Force: ; MOVW DP, #_GpioDataRegs.GPADAT ; load Data Page to read GPIO registers ; MOV @_GpioDataRegs.GPASET, #128 ; Set GPIO7, Used for debug purposes B ControlLoopEnd, UNC NegativeCycle: ; Save Vrect MOV ACC, @_AdcResult.ADCRESULT4<<12 ; ACC = Neutral SUB ACC, @_AdcResult.ADCRESULT3<<12 ; ACC = Neutral - Line MOVW DP, #_Vrect MOVL @_Vrect, ACC
; ePWM2 & ADC configuration MOVW DP, #_AdcRegs.ADCSOC1CTL ; load Data Page to read ADC results ; MOV @_AdcRegs.ADCSOC1CTL.bit.CHSEL, #4 ; Switch ADC to IpfcB current EALLOW MOV @_AdcRegs.ADCSOC1CTL, #10502 ; Switch ADC to IpfcB current EDIS MOVW DP, #_EPwm2Regs.AQCTLA ; load Data Page to read ePWM registers ; MOV @_EPwm2Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM2 on CompA-Up (enable switching) ; MOV @_EPwm2Regs.AQCTLA.bit.CAD, #2 ; SET ePWM2 on CompA-Down (enable switching) MOV @_EPwm2Regs.AQCTLA, #144 ; SET ePWM2 on CompA-Down, CLEAR CompA-Up (enable switching) MOVW DP, #_EPwm1Regs.AQCTLA ; load Data Page to read ePWM registers ; MOV @_EPwm1Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM1 on CompA-Up ; MOV @_EPwm1Regs.AQCTLA.bit.CAD, #1 ; CLEAR ePWM1 on CompA-Down (force low) MOV @_EPwm1Regs.AQCTLA, #80 ; CLEAR ePWM1 on CompA-Up/Down (force low) ; Check if near Zero crossing before forcing ePWM1 High ;SUB ACC, #100<<12 SUB ACC, #50<<12 B SkipPWM1Force, LT ; MOV @_EPwm1Regs.AQCTLA.bit.CAU, #2 ; SET ePWM1 on CompA-Up (force high) ; MOV @_EPwm1Regs.AQCTLA.bit.CAD, #2 ; SET ePWM1 on CompA-Down MOV @_EPwm1Regs.AQCTLA, #160 ; SET ePWM1 on CompA-Up/Down (force high) SkipPWM1Force: ; MOVW DP, #_GpioDataRegs.GPADAT ; load Data Page to read GPIO registers ; MOV @_GpioDataRegs.GPACLEAR, #128 ; Clear GPIO7, Used for debug purposes
ControlLoopEnd: ;.endif ;---------------------------------------------------------- ; .ref _Duty4A ; MOVW DP, #_Vrect ; MOVL ACC, @_Vrect ; MOVW DP, #_Duty4A ; MOVL @_Duty4A, ACC ;Write 9 bit value to Duty4A
;----------------------------------------------------------------------------------------- ; Interrupt management before exit
.if(EPWMn_DPL_ISR=1)
.if(EPWM1) MOVW DP,#_EPwm1Regs.ETCLR MOV @_EPwm1Regs.ETCLR,#0x01 ; Clear EPWM1 Int flag .endif ; EPWM1
.if(EPWM2) MOVW DP,#_EPwm2Regs.ETCLR MOV @_EPwm2Regs.ETCLR,#0x01 ; Clear EPWM2 Int flag .endif ; EPWM2
MOVW DP,#_PieCtrlRegs.PIEACK ; Acknowledge PIE interrupt Group 3 MOV @_PieCtrlRegs.PIEACK, #0x4 .endif ; EPWMn_ISR
.if(ADC_DPL_ISR=1) ; Case where ISR is triggered by ADC ; MOVW DP,#_AdcRegs.ADCINTFLGCLR ; MOV @AdcRegs.ADCINTFLGCLR, #0x01 ; Clear ADCINT1 Flag
MOVW DP,#_PieCtrlRegs.PIEACK ; Acknowledge PIE interrupt Group 1 MOV @_PieCtrlRegs.PIEACK, #0x1 .endif
;----------------------------------------------------------------------------------------- ; full context restore ; SETC INTM ; set INTM to protect context restore POP XT POP XAR7 POP XAR6 POP XAR5 POP XAR4 POP XAR3 POP XAR2 POP AR1H:AR0H IRET ; return from interrupt .end
if (VbusAvg > VBUS_OVP_THRSHLD)//Check for Vbus OV Condition VBUS_OVP_THRSHLD= 440V { OV_flag = 1; EALLOW; EPwm1Regs.TZFRC.bit.OST = 1;//Turn off PWM for OV condition EPwm2Regs.TZFRC.bit.OST = 1;//Turn off PWM for OV condition EDIS;
sine_mainsV.Vin = Vrect >> 9; // input in IQ15 format SineAnalyzer_MACRO (sine_mainsV); VrectRMS = (sine_mainsV.Vrms)<< 9;// Convert sine_mainsV.Vrms from Q15 to Q24 and save as VrectRMS Freq_Vin = sine_mainsV.SigFreq;// Q15 //VrmsReal = _IQ15mpy (KvInv, sine_mainsV.Vrms);
//Start of Non-linear Volt loop control if (run_flag == 1 && flag_NL_Vloop == 1) //If soft-start is over, PFC running normally & NL Vloop flag is set {
error_v = VbusTargetSlewed - Vbus;
if (error_v > VBUS_ERROR_NL_CNTRL_THRSHLD || ((-1)*(error_v))> VBUS_ERROR_NL_CNTRL_THRSHLD) // (15V/519V)*4095*4095 = 484654.0 //(12V/519V)*4095*4095 = 387912.0 { CNTL_2P2Z_CoefStruct2.b1 =_IQ26(-4.495);//(-0.7495);//(Igain_V-Pgain_V-Dgain_V-Dgain_V); // 2.5, 0.005, B1 CNTL_2P2Z_CoefStruct2.b0 =_IQ26(4.505);//(0.7505);//(Pgain_V + Igain_V + Dgain_V); // B0 ;//Use NL v loop coefficients } else { CNTL_2P2Z_CoefStruct2.b1 =_IQ26(-0.2495);//Otherwise use normal v loop coefficients CNTL_2P2Z_CoefStruct2.b0 =_IQ26(0.2505);//KP=0.25, KI=0.0005 } } //End of NL V loop Control
//Start of Adaptive Current control loop if (disable_auto_cloop_coeff_change == 0) { if (VrectRMS <= 7588716) { //(185/409)*2e24 = 7588716, //KP=73750 CNTL_2P2Z_CoefStruct1.b1 =_IQ26(-0.9722);// B1 CNTL_2P2Z_CoefStruct1.b0 =_IQ26(1.7097); // B0 }
if (VrectRMS > 7588716 && VrectRMS <= 9639721) { //(235/409)*2e24 = 9639721, //(185/409)*2e24 = 7588716, //(225/409)*2e24 = 9229520,Use this lower limit for modified RC filter in CS ckt
