关于controlsuit中无桥PFC电路中断interrupt void SECONDARY_ISR(void)

interrupt void SECONDARY_ISR(void)
{
 EINT;
 
  if (VbusAvg > VBUS_OVP_THRSHLD)//Check for Vbus OV Condition  VBUS_OVP_THRSHLD= 440V
  {
    OV_flag = 1; 
    EALLOW;
    EPwm1Regs.TZFRC.bit.OST = 1;//Turn off PWM for OV condition
    EPwm2Regs.TZFRC.bit.OST = 1;//Turn off PWM for OV condition
    EDIS; 
    
    VbusTargetSlewed = 0;
    VbusTarget = 0;  
    Gui_Vbus_set = 0;   
  }   
 
 //Calculate RMS input voltage and input frequency
 
 sine_mainsV.Vin = Vrect >> 9; // input in IQ15 format
    SineAnalyzer_MACRO (sine_mainsV);
 VrectRMS = (sine_mainsV.Vrms)<< 9;//    Convert sine_mainsV.Vrms from Q15 to Q24 and save as VrectRMS
 Freq_Vin = sine_mainsV.SigFreq;// Q15
 //VrmsReal = _IQ15mpy (KvInv, sine_mainsV.Vrms);

 //Start of Non-linear Volt loop control
  if (run_flag == 1 && flag_NL_Vloop == 1) //If soft-start is over, PFC running normally & NL Vloop flag is set
  {
  
   error_v = VbusTargetSlewed - Vbus;

   if (error_v > VBUS_ERROR_NL_CNTRL_THRSHLD || ((-1)*(error_v))> VBUS_ERROR_NL_CNTRL_THRSHLD)
    // (15V/519V)*4095*4095 = 484654.0
    //(12V/519V)*4095*4095 = 387912.0
   {
   CNTL_2P2Z_CoefStruct2.b1   =_IQ26(-4.495);//(-0.7495);//(Igain_V-Pgain_V-Dgain_V-Dgain_V);  // 2.5, 0.005, B1
      CNTL_2P2Z_CoefStruct2.b0   =_IQ26(4.505);//(0.7505);//(Pgain_V + Igain_V + Dgain_V);      // B0      ;//Use NL v loop coefficients
   }
   else
   {
   CNTL_2P2Z_CoefStruct2.b1   =_IQ26(-0.2495);//Otherwise use normal v loop coefficients
   CNTL_2P2Z_CoefStruct2.b0   =_IQ26(0.2505);//KP=0.25, KI=0.0005
   }
  } //End of NL V loop Control

 //Start of Adaptive Current control loop
  if (disable_auto_cloop_coeff_change == 0)
  {
   if (VrectRMS <= 7588716) 
   {
   //(185/409)*2e24 = 7588716,
   //KP=73750
   CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.9722);// B1
      CNTL_2P2Z_CoefStruct1.b0   =_IQ26(1.7097);  // B0
   }
   
   if (VrectRMS > 7588716 && VrectRMS <= 9639721) 
   {
   //(235/409)*2e24 = 9639721,
   //(185/409)*2e24 = 7588716,
   //(225/409)*2e24 = 9229520,Use this lower limit for modified RC filter in CS ckt
   
   //KP=53750
   //CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.7085);// B1
      //CNTL_2P2Z_CoefStruct1.b0   =_IQ26(1.246);  // B0
      
      //KP=63750
   CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.8403);// B1
      CNTL_2P2Z_CoefStruct1.b0   =_IQ26(1.4778);  // B0
      
   }
   
   if (VrectRMS > 9639721 && VrectRMS <= 10049922)
   {
   // (235/409)*2e24 = 9639721,
   //(245/409)*2e24 = 10049922,
   
    //KP=33750
   //CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.4449);// B1
      //CNTL_2P2Z_CoefStruct1.b0   =_IQ26(0.7824);  // B0
      
      //KP=13750
   CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.1812);// B1
      CNTL_2P2Z_CoefStruct1.b0   =_IQ26(0.3187);  // B0
   }
   
   if (VrectRMS > 10049922 && VrectRMS <= 10255022)
   {
   // (245/409)*2e24 = 10049922,
   //(250/409)*2e24 = 10255022,
   
    //KP=23750
   //CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.3131);// B1
      //CNTL_2P2Z_CoefStruct1.b0   =_IQ26(0.5506);  // B0
      
      //KP=13750
   CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.1812);// B1
      CNTL_2P2Z_CoefStruct1.b0   =_IQ26(0.3187);  // B0
   }
   
   if (VrectRMS > 10255022)
   {
   //(250/409)*2e24 = 10255022,
    //KP=13750
   CNTL_2P2Z_CoefStruct1.b1   =_IQ26(-0.1812);// B1
      CNTL_2P2Z_CoefStruct1.b0   =_IQ26(0.3187);  // B0
   }
  }//End of Adaptive Current control loop

 EPwm7Regs.ETCLR.bit.INT = 1;     // Enable ePWM7 INTN pulse
 PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
 return;
}