CLA的TASK软件触发不了

user4675816

代码是根据Controlsuit 中的fir32例程改的，本来是可以触发CLA任务的，添加了大量代码后触发不了了。而且触发TASK1时会在Cla1ForceTask1andWait();这一句一直等待，然后看门狗动作了。但是触发TASK8时Cla1ForceTask1andWait();处不会一直等待，但是好像TASK8并没有被执行。第一次用CLA，想不出来是什么原因，谢谢帮忙！！代码已经发到附件。芯片是28035.

问题一：删除memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);以及ADC初始化后又可以触发了，请问这是什么原理。

问题二：另外这种状态下我改成PWM1触发TASK1,已经能进PWM中断了，且配置了SOCA,但是触发不了CLA，请问软件触发改PWM触发后还要设置什么。谢谢了

fir32_main.c

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//###########################################################################
// Description:
//! \addtogroup f2803x_example_cla_list
//! <h1> Finite Impulse Response Filter </h1>
//!
//! A 5 tap FIR filter is implemented in Task 1 of the
//! CLA.
//!
//! \b Watch \b Variables \n
//! - xResult - Result of the FIR operation
//! - xAdcInput - Simulated ADC input
//
//###########################################################################
// $TI Release: F2803x C/C++ Header Files and Peripheral Examples V130 $
// $Release Date: May  8, 2015 $
// $Copyright: Copyright (C) 2009-2015 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
#include "UserInclude.h"
#include "DSP2803x_Cla_defines.h"
#include "string.h"
// Include the test header file whose name is based on the test name
// which is defined by the macro TEST on the command line
#include XSTRINGIZE(XCONCAT(TEST_NAME,_shared.h))
#define CLARAM0_ENABLE  1
#define CLARAM1_ENABLE  1
// Constants
#define OSCCLK       (10000000UL)            // < Internal OSC frequency
#define SYSCLK       (80000000UL)            // < System Clock frequency
#define PER_CLK_DIV  (4)                     // < Low speed peripheral clock dividers
#define PER_CLK      (SYSCLK/PER_CLK_DIV)    // < Low speed peripheral clock
#define DIV_SEL      (2)                     // < Clock divider selection
#define CLK_DIV      ((SYSCLK * DIV_SEL)/OSCCLK) // < Clock divider
//CLA ISRs
__interrupt void cla1_task1_isr( void );
__interrupt void cla1_task2_isr( void );
__interrupt void cla1_task3_isr( void );
__interrupt void cla1_task4_isr( void );
__interrupt void cla1_task5_isr( void );
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//###########################################################################
// Description:
//! \addtogroup f2803x_example_cla_list
//! <h1> Finite Impulse Response Filter </h1>
//!
//! A 5 tap FIR filter is implemented in Task 1 of the
//! CLA.
//!
//! \b Watch \b Variables \n
//! - xResult - Result of the FIR operation
//! - xAdcInput - Simulated ADC input
//
//###########################################################################
// $TI Release: F2803x C/C++ Header Files and Peripheral Examples V130 $
// $Release Date: May  8, 2015 $
// $Copyright: Copyright (C) 2009-2015 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
#include "UserInclude.h"
#include "DSP2803x_Cla_defines.h"
#include "string.h"
// Include the test header file whose name is based on the test name
// which is defined by the macro TEST on the command line
#include XSTRINGIZE(XCONCAT(TEST_NAME,_shared.h))

#define CLARAM0_ENABLE	1
#define CLARAM1_ENABLE	1


// Constants
#define OSCCLK	     (10000000UL) 	         // < Internal OSC frequency
#define SYSCLK	     (80000000UL) 			 // < System Clock frequency
#define PER_CLK_DIV  (4)					 // < Low speed peripheral clock dividers
#define PER_CLK	     (SYSCLK/PER_CLK_DIV)	 // < Low speed peripheral clock
#define DIV_SEL	     (2)		             // < Clock divider selection
#define CLK_DIV	     ((SYSCLK * DIV_SEL)/OSCCLK) // < Clock divider

//CLA ISRs
__interrupt void cla1_task1_isr( void );
__interrupt void cla1_task2_isr( void );
__interrupt void cla1_task3_isr( void );
__interrupt void cla1_task4_isr( void );
__interrupt void cla1_task5_isr( void );
__interrupt void cla1_task6_isr( void );
__interrupt void cla1_task7_isr( void );
__interrupt void cla1_task8_isr( void );

//Linker defined vars
extern Uint16 Cla1Prog_Start;
extern Uint16 Cla1funcsLoadStart;
extern Uint16 Cla1funcsLoadEnd;
extern Uint16 Cla1funcsRunStart;
extern Uint16 Cla1funcsLoadSize;
extern Uint16 Cla1mathTablesLoadStart;
extern Uint16 Cla1mathTablesRunStart;
extern Uint16 Cla1mathTablesLoadSize;

//  Main Function
void main(void)
{
   //  Step 1: Setup the system clock
   /*  Disable the watchdog timer, initialize the system clock,
    *  PLL and configure the peripheral clock.
    */
   InitSysCtrl();

   memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);
   //  Step 2: Initialize PIE control
   /*  Initialize PIE control, disable all interrupts and
    * then copy over the PIE Vector table from BootROM to RAM
    */
   DINT;
   InitPieCtrl();
   IER = 0x00000000;
   IFR = 0x00000000;
   InitPieVectTable();

   InitGpio();
   UserInitGpio();

   InitAdc();
//   InitAdcAio();
   UserAdcConfigure();

   InitEPwm();
   InitEPwmGpio();

   InitECan();

   InitI2C();
   InitI2CGpio();
   /*  Assign user defined ISR to the PIE vector table */
   EALLOW;
   PieVectTable.CLA1_INT1  = &cla1_task1_isr;
   PieVectTable.CLA1_INT2  = &cla1_task2_isr;
   PieVectTable.CLA1_INT3  = &cla1_task3_isr;
   PieVectTable.CLA1_INT4  = &cla1_task4_isr;
   PieVectTable.CLA1_INT5  = &cla1_task5_isr;
   PieVectTable.CLA1_INT6  = &cla1_task6_isr;
   PieVectTable.CLA1_INT7  = &cla1_task7_isr;
   PieVectTable.CLA1_INT8  = &cla1_task8_isr;

   PieVectTable.TINT0 = &cpu_timer0_isr;                         //��ʱ��T0�ж�
   PieVectTable.EPWM1_INT = &epwm1_isr;                          //PWM�ж�
   PieVectTable.ECAN0INTA =  &ecan0_isr;
   PieVectTable.I2CINT1A = &i2cint2a_isr;
   EDIS;

   //Copy over the CLA code and Tables
   memcpy(&Cla1funcsRunStart, &Cla1funcsLoadStart, (Uint32)&Cla1funcsLoadSize);
   memcpy(&Cla1mathTablesRunStart, &Cla1mathTablesLoadStart, (Uint32)&Cla1mathTablesLoadSize);

   /*  Compute all CLA task vectors */
   EALLOW;
   Cla1Regs.MVECT1 = (Uint16)((Uint32)&Cla1Task1 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT2 = (Uint16)((Uint32)&Cla1Task2 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT3 = (Uint16)((Uint32)&Cla1Task3 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT4 = (Uint16)((Uint32)&Cla1Task4 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT5 = (Uint16)((Uint32)&Cla1Task5 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT6 = (Uint16)((Uint32)&Cla1Task6 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT7 = (Uint16)((Uint32)&Cla1Task7 - (Uint32)&Cla1Prog_Start);
   Cla1Regs.MVECT8 = (Uint16)((Uint32)&Cla1Task8 - (Uint32)&Cla1Prog_Start);
   EDIS;

   //  Step 3 : Mapping CLA tasks
   /*  All tasks are enabled and will be started by an ePWM trigger
    *  Map CLA program memory to the CLA and enable software breakpoints
    */
   EALLOW;
   Cla1Regs.MPISRCSEL1.bit.PERINT1SEL 	= CLA_INT1_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT2SEL 	= CLA_INT2_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT3SEL 	= CLA_INT3_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT4SEL 	= CLA_INT4_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT5SEL 	= CLA_INT5_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT6SEL 	= CLA_INT6_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT7SEL 	= CLA_INT7_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT8SEL 	= CLA_INT8_NONE;
   Cla1Regs.MIER.all 		 		    = 0x00FF;
   EDIS;


   InitCpuTimers();
   ConfigCpuTimer(&CpuTimer0, 60, 10000);                        //60M,10ms
   StartCpuTimer0();

   /*  Enable CLA interrupts at the group and subgroup levels */
   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;                            //��ʱ��T0�ж�����
   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;                            //PWM1�ж�
   PieCtrlRegs.PIEIER11.all = 0xFF81;                           //����CLA����TASK1��TASK8
   PieCtrlRegs.PIEIER9.bit.INTx5 = 1;                          //����Cana�ж�
   PieCtrlRegs.PIEIER8.bit.INTx1 = 1;                          //I2C

   IER |= M_INT9;                                                //can
   IER |= M_INT8;                                                //I2C
   IER |= M_INT3;                                                //����EPWM �жϣ�
   IER |= M_INT1;                                                //�����ʱ��T0�ж�
   IER |= M_INT11;
   EINT;   // Enable Global interrupt INTM
   ERTM;   // Enable Global realtime interrupt DBGM

   /* Switch the CLA program space to the CLA and enable software forcing
    * Also switch over CLA data ram 0 and 1
    */
   EALLOW;
   Cla1Regs.MMEMCFG.bit.PROGE 	= 1;
   Cla1Regs.MCTL.bit.IACKE	= 1;
   Cla1Regs.MMEMCFG.bit.RAM0E	= CLARAM0_ENABLE;
   Cla1Regs.MMEMCFG.bit.RAM1E	= CLARAM1_ENABLE;
   EDIS;

   AdcGlobalVarsInit();
   PwmGlobalVarsInit();
   MonitorGlobalVarsInit();
   ControlGlobalVarsInit();
   EcanGlobalVarsInit();
   I2cGlobalVarsInit();
   CorrectGlobalVarsInit();
   Cla1ForceTask8andWait();

   EnableDog();

   for( ; ; )
   {
	   ServiceDog();
	   AdcDataDeal();         //��ѹ���������¶Ȳ���
	   FaultCheckMonitor();   //���ϼ��
	   WorkStepCtl();
	   SoftStartControl();
	   CanCommunication();
	   I2cStorageProcess();
	   CorrectCoffAdjust ();
//	   CorrectCoffCh();

   }
}

//###########################################################################
// CLA ISRs
//###########################################################################
__interrupt void cla1_task1_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task2_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task3_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task4_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task5_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task6_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task7_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

__interrupt void cla1_task8_isr( void)
{
        PieCtrlRegs.PIEACK.bit.ACK11 = 1;
}

7 年多前

C2000 微控制器

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CLA的TASK软件触发不了