使用2837x 的ADC 关于参考电压VREHI的供电

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Figure 10-22 shows the basic organization of the external voltage reference generation circuitry. A single
reference voltage generation should be shared by all ADC modules. This will minimize reference voltage
mismatch between ADC modules. The reference voltage should then be buffered by a precision op-amp
with good bandwidth and low output impedance before being driven into the reference pin. A capacitor
between the high and low reference pins should be placed on the PCB as close to the pins as practical to
help absorb high frequency currents. A series resistor (typically <1Ω ) in series with this capacitor may be
necessary to ensure op-amp
It is also possible to share two reference pins between one op-amp driver. This organization is shown in
Figure 10-24. This will give slightly reduced performance compared to the case where each reference pin
has a dedicated op-amp buffer, but it should still be possible to achieve all ADC specifications in the data
manual..