F28004x使用CMPSS和EPWM用于硬件限流，DCBEVT1不能正常触发问题

使用CMPSS和EPWM实现三相正弦的限流，在开发板上用DAC输出测试。

DACA-A3-CMPSS1-EPWM1

DACB-B3-CMPSS3-EPWM2

组合触发：TRIP4、TRIP7-DCxH，TRIP5、TRIP8-DCxL。

当任一CMPSS输入大于超过CMPxH DAC设定值时能够触发DCAEVT1，EPWM1、EPWM2都停止。

但当一CMPSS输入小于CMPxL DAC设定值时并不能触发DCBEVT1，当2个CMPSS输入小于CMPxL设定值时才能触发DCBEVT1，如何纠正？

以下是代码实现：

/*
 * app.c
 *
 *  Created on: 20190829
 *      Author: Administrator
 */

#include "monitor/monitor.h"

#include <f28004x_device.h>
#include <device.h>
#include <driverlib.h>
#include <math.h>

#define PI              3.141592654f

__interrupt void TIM2_IntHandler(void);
__interrupt void CANA0_IntHandler(void);
__interrupt void ADCA1_IntHandler(void);

void TIM2Init(uint32_t freq_hz);
void CANAInit(void);
void PWMInit(uint32_t freq);
void ADCInit(void);
void DACInit(void);
void ASysCtlInit(void);  // 模拟子系统初始化
void CMPSSInit(void);

static uint32_t os_time = 0;


void main(void)
{
    Device_init();
    Device_initGPIO();

    // LED
    GPIO_setPinConfig(GPIO_34_GPIO34);
    GPIO_setDirectionMode(34u, GPIO_DIR_MODE_OUT);
    GPIO_setAnalogMode(23u, GPIO_ANALOG_DISABLED);
    GPIO_setPinConfig(GPIO_23_GPIO23);
    GPIO_setDirectionMode(23u, GPIO_DIR_MODE_OUT);
    // CANB
    GPIO_setPinConfig(GPIO_32_CANTXA);
    GPIO_setPinConfig(GPIO_33_CANRXA);
    // PWM
    GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
    GPIO_setPinConfig(GPIO_0_EPWM1A);
    GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
    GPIO_setPinConfig(GPIO_1_EPWM1B);
    GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
    GPIO_setPinConfig(GPIO_2_EPWM2A);
    GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
    GPIO_setPinConfig(GPIO_3_EPWM2B);
    // INT
    Interrupt_initModule();
    Interrupt_initVectorTable();
    Interrupt_register(INT_ADCA1, ADCA1_IntHandler);
    Interrupt_register(INT_TIMER2, &TIM2_IntHandler);
    Interrupt_register(INT_CANA0, CANA0_IntHandler);

    DACInit();
    DAC_setShadowValue(DACA_BASE, 1000U);
    DAC_setShadowValue(DACB_BASE, 1000U);

    TIM2Init(1000u);    // 1kHz
    CANAInit();         // 1Mbps
    ADCInit();
    ASysCtlInit();
    CMPSSInit();
    PWMInit(10000u);    // 10kHz

    MonitorInit();      //

    DEVICE_DELAY_US(30000);

    Interrupt_enable(INT_ADCA1);
    Interrupt_enable(INT_TIMER2);
    Interrupt_enable(INT_CANA0);

    EINT;
    ERTM;

    while (1)
    {
        MonitorRecvMessage();
        MonitorSendMessage();
    }
}

void TIM2Init(uint32_t freq_hz)
{
    uint32_t tmp = 0;

    if (0u != freq_hz)
    {
        tmp = DEVICE_SYSCLK_FREQ / freq_hz;
        CPUTimer_setPeriod(CPUTIMER2_BASE, tmp);
        CPUTimer_setPreScaler(CPUTIMER2_BASE, (uint16_t)CPUTIMER_CLOCK_PRESCALER_1);
        CPUTimer_stopTimer(CPUTIMER2_BASE);
        CPUTimer_reloadTimerCounter(CPUTIMER2_BASE);
        CPUTimer_enableInterrupt(CPUTIMER2_BASE);
        CPUTimer_startTimer(CPUTIMER2_BASE);
    }
}

__interrupt void TIM2_IntHandler(void)
{
    float ch0_val = 0.f;
    float ch1_val = 0.f;
    float ch2_val = 0.f;
    float ch3_val = 0.f;
    float ch4_val = 0.f;
    static float tmp = 0.f;
    static int32_t timestamp = 0;

    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
    IER |= 0x0001u;
    IER &= 0x0001u;
    PieCtrlRegs.PIEIER1.all &= 0x0001u;
    PieCtrlRegs.PIEACK.all = 0xFFFFu;
    asm(" NOP");
    EINT;
    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/

    os_time++;

    ch0_val = 1000.f;
    ch1_val = 1000.f * sinf(tmp);
    ch2_val = 1000.f * cosf(tmp);
    ch3_val = (float)(timestamp % 1000);
    ch4_val = -1000.f;
    tmp += PI / 500.f;
    timestamp++;
    MonPushFloat(0u, ch0_val);
    MonPushFloat(1u, ch1_val);
    MonPushFloat(2u, ch2_val);
    MonPushFloat(3u, ch3_val);
    MonPushFloat(4u, ch4_val);

//    if (0u == os_time % 500u)
//    {
//        GPIO_togglePin(34u);
//    }

    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
    DINT;
    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
}

uint32_t OSTimeGet(void)
{
    uint32_t ret = 0;

    ret = os_time;
    return ret;
}

void CANAInit(void)
{
    CAN_initModule(CANA_BASE);
    CAN_setBitRate(CANA_BASE, DEVICE_SYSCLK_FREQ, 1000000u, (uint16_t)10u);   // 1M bps
    CAN_enableInterrupt(CANA_BASE, CAN_INT_IE0 | CAN_INT_ERROR | CAN_INT_STATUS);

    CAN_enableGlobalInterrupt(CANA_BASE, CAN_GLOBAL_INT_CANINT0);

    BspMonCanMailBoxCfg();

    CAN_startModule(CANA_BASE);
}

uint16_t errorFlag = 0;

__interrupt void CANA0_IntHandler(void)
{
    uint32_t status;
    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
    uint16_t temp_PIEIER;
    temp_PIEIER = PieCtrlRegs.PIEIER9.all;
    IER |= 0x0001u;
    IER &= 0x0001u;
    PieCtrlRegs.PIEIER1.all &= 0x0001u;
    PieCtrlRegs.PIEACK.all = 0xFFFFu;
    asm(" NOP");
    EINT;
    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/

    status = CAN_getInterruptCause(CANA_BASE);
    if(status == CAN_INT_INT0ID_STATUS)
    {
        status = CAN_getStatus(CANA_BASE);
        if(((status  & ~(CAN_STATUS_TXOK | CAN_STATUS_RXOK)) != 7u) &&
           ((status  & ~(CAN_STATUS_TXOK | CAN_STATUS_RXOK)) != 0u))
        {
            // Set a flag to indicate some errors may have occurred.
            errorFlag = 1;
        }
    }
    else if(status == MON_CAN_TX_MSG_OBJ_ID)
    {
        CAN_clearInterruptStatus(CANA_BASE, MON_CAN_TX_MSG_OBJ_ID);

        BspMonCanTxCallBack();
    }
    else if(status == MON_CAN_RX_MSG_OBJ_ID)
    {
        CAN_clearInterruptStatus(CANA_BASE, MON_CAN_RX_MSG_OBJ_ID);

        BspMonCanRxCallBack();
    }
    else
    {
        // Spurious interrupt handling can go here.
        errorFlag = 1;
    }

    CAN_clearGlobalInterruptStatus(CANA_BASE, CAN_GLOBAL_INT_CANINT0);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);

    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
    DINT;
    PieCtrlRegs.PIEIER9.all = temp_PIEIER;
    /********** 中断嵌套 使电机ADC中断成为最高优先级 ******************************/
}

void PWMInit(uint32_t freq)
{
    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

    // cmpss link to epwm trip
    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX00_CMPSS1_CTRIPH);
    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX00);
    XBAR_setEPWMMuxConfig(XBAR_TRIP5, XBAR_EPWM_MUX01_CMPSS1_CTRIPL);
//    XBAR_invertEPWMSignal(XBAR_TRIP5, true);
    XBAR_enableEPWMMux(XBAR_TRIP5, XBAR_MUX01);
    XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX04_CMPSS3_CTRIPH);
    XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX04);
    XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX05_CMPSS3_CTRIPL);
//    XBAR_invertEPWMSignal(XBAR_TRIP8, true);
    XBAR_enableEPWMMux(XBAR_TRIP8, XBAR_MUX05);

    // -------------------------------------------------- PWM1 ------------------------------------------------- //
    EPWM_enableDigitalCompareTripCombinationInput(EPWM1_BASE, EPWM_DC_COMBINATIONAL_TRIPIN4
                                                            | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAH);
    EPWM_enableDigitalCompareTripCombinationInput(EPWM1_BASE, EPWM_DC_COMBINATIONAL_TRIPIN5
                                                            | EPWM_DC_COMBINATIONAL_TRIPIN8, EPWM_DC_TYPE_DCBL);
    EPWM_setTripZoneDigitalCompareEventCondition(EPWM1_BASE, EPWM_TZ_DC_OUTPUT_A1, EPWM_TZ_EVENT_DCXH_HIGH);
    EPWM_setTripZoneDigitalCompareEventCondition(EPWM1_BASE, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXL_LOW);
    EPWM_setDigitalCompareEventSource(EPWM1_BASE, EPWM_DC_MODULE_A, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_setDigitalCompareEventSource(EPWM1_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_setDigitalCompareEventSyncMode(EPWM1_BASE, EPWM_DC_MODULE_A, EPWM_DC_EVENT_1, EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    EPWM_setDigitalCompareEventSyncMode(EPWM1_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    EPWM_setTripZoneAction(EPWM1_BASE, EPWM_TZ_ACTION_EVENT_TZA, EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(EPWM1_BASE, EPWM_TZ_ACTION_EVENT_TZB, EPWM_TZ_ACTION_LOW);
    EPWM_enableTripZoneSignals(EPWM1_BASE, EPWM_TZ_SIGNAL_DCAEVT1 | EPWM_TZ_SIGNAL_DCBEVT1);

    // Set-up TBCLK
    EPWM_setTimeBasePeriod(EPWM1_BASE, DEVICE_SYSCLK_FREQ / (freq * 2u));
    EPWM_setPhaseShift(EPWM1_BASE, 0U);
    EPWM_setTimeBaseCounter(EPWM1_BASE, 0U);

    EPWM_enableADCTrigger(EPWM1_BASE, EPWM_SOC_A);
    EPWM_setADCTriggerSource(EPWM1_BASE, EPWM_SOC_A, EPWM_SOC_TBCTR_ZERO);
    EPWM_setADCTriggerEventPrescale(EPWM1_BASE, EPWM_SOC_A, 1U);

    // Set up counter mode
    EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_UP_DOWN);
    EPWM_disablePhaseShiftLoad(EPWM1_BASE);
    EPWM_setClockPrescaler(EPWM1_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1);
    // Set up shadowing
    EPWM_setCounterCompareShadowLoadMode(EPWM1_BASE, EPWM_COUNTER_COMPARE_A, EPWM_COMP_LOAD_ON_CNTR_ZERO);
    EPWM_setCounterCompareShadowLoadMode(EPWM1_BASE, EPWM_COUNTER_COMPARE_B, EPWM_COMP_LOAD_ON_CNTR_ZERO);
    // Set Compare values
    EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_A, 2500u);
    EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_B, 2500u);
    // Set actions
    EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
    EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
    EPWM_setActionQualifierAction(EPWM1_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);

    // -------------------------------------------------- PWM2 ------------------------------------------------- //
    EPWM_enableDigitalCompareTripCombinationInput(EPWM2_BASE, EPWM_DC_COMBINATIONAL_TRIPIN4
                                                            | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAH);
    EPWM_enableDigitalCompareTripCombinationInput(EPWM2_BASE, EPWM_DC_COMBINATIONAL_TRIPIN5
                                                            | EPWM_DC_COMBINATIONAL_TRIPIN8, EPWM_DC_TYPE_DCBL);
    EPWM_setTripZoneDigitalCompareEventCondition(EPWM2_BASE, EPWM_TZ_DC_OUTPUT_A1, EPWM_TZ_EVENT_DCXH_HIGH);
    EPWM_setTripZoneDigitalCompareEventCondition(EPWM2_BASE, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXL_LOW);
    EPWM_setDigitalCompareEventSource(EPWM2_BASE, EPWM_DC_MODULE_A, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_setDigitalCompareEventSource(EPWM2_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_setDigitalCompareEventSyncMode(EPWM2_BASE, EPWM_DC_MODULE_A, EPWM_DC_EVENT_1, EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    EPWM_setDigitalCompareEventSyncMode(EPWM2_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_INPUT_NOT_SYNCED);
    EPWM_setTripZoneAction(EPWM2_BASE, EPWM_TZ_ACTION_EVENT_TZA, EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(EPWM2_BASE, EPWM_TZ_ACTION_EVENT_TZB, EPWM_TZ_ACTION_LOW);
    EPWM_enableTripZoneSignals(EPWM2_BASE, EPWM_TZ_SIGNAL_DCAEVT1 | EPWM_TZ_SIGNAL_DCBEVT1);

    // Set-up TBCLK
    EPWM_setTimeBasePeriod(EPWM2_BASE, DEVICE_SYSCLK_FREQ / (freq * 2u));
    EPWM_setPhaseShift(EPWM2_BASE, 0U);
    EPWM_setTimeBaseCounter(EPWM2_BASE, 0U);

    EPWM_enableADCTrigger(EPWM2_BASE, EPWM_SOC_A);
    EPWM_setADCTriggerSource(EPWM2_BASE, EPWM_SOC_A, EPWM_SOC_TBCTR_ZERO);
    EPWM_setADCTriggerEventPrescale(EPWM2_BASE, EPWM_SOC_A, 1U);

    // Set up counter mode
    EPWM_setTimeBaseCounterMode(EPWM2_BASE, EPWM_COUNTER_MODE_UP_DOWN);
    EPWM_disablePhaseShiftLoad(EPWM2_BASE);
    EPWM_setClockPrescaler(EPWM2_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1);
    // Set up shadowing
    EPWM_setCounterCompareShadowLoadMode(EPWM2_BASE, EPWM_COUNTER_COMPARE_A, EPWM_COMP_LOAD_ON_CNTR_ZERO);
    EPWM_setCounterCompareShadowLoadMode(EPWM2_BASE, EPWM_COUNTER_COMPARE_B, EPWM_COMP_LOAD_ON_CNTR_ZERO);
    // Set Compare values
    EPWM_setCounterCompareValue(EPWM2_BASE, EPWM_COUNTER_COMPARE_A, 2500u);
    EPWM_setCounterCompareValue(EPWM2_BASE, EPWM_COUNTER_COMPARE_B, 2500u);
    // Set actions
    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
    EPWM_setActionQualifierAction(EPWM2_BASE, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    // Clear trip flags
    EPWM_clearTripZoneFlag(EPWM1_BASE, EPWM_TZ_INTERRUPT | EPWM_TZ_FLAG_OST);
    EPWM_clearTripZoneFlag(EPWM2_BASE, EPWM_TZ_INTERRUPT | EPWM_TZ_FLAG_OST);
}

void ASysCtlInit(void)
{
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1, 3u);  // CMP1HP - A3
    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1, 3u);  // CMP1LP - A3
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_3, 3u);  // CMP3HP - B3
    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_3, 3u);  // CMP3LP - B3
}

void DACInit(void)
{
    // DACA - CMPSS1
    DAC_setGainMode(DACA_BASE, DAC_GAIN_TWO);
    DAC_setReferenceVoltage(DACA_BASE, DAC_REF_ADC_VREFHI);
    DAC_setLoadMode(DACA_BASE, DAC_LOAD_SYSCLK);
    DAC_enableOutput(DACA_BASE);
    // DACB - CMPSS3
    DAC_setGainMode(DACB_BASE, DAC_GAIN_TWO);
    DAC_setReferenceVoltage(DACB_BASE, DAC_REF_ADC_VREFHI);
    DAC_setLoadMode(DACB_BASE, DAC_LOAD_SYSCLK);
    DAC_enableOutput(DACB_BASE);
}

void CMPSSInit(void)
{
    // Enable CMPSS and configure the negative input signal to come from
    // the DAC
    CMPSS_enableModule(CMPSS1_BASE);
    CMPSS_configHighComparator(CMPSS1_BASE, CMPSS_INSRC_DAC);
    CMPSS_configLowComparator(CMPSS1_BASE, CMPSS_INSRC_DAC);
    // Use VDDA as the reference for the DAC and set DAC value to midpoint for
    // arbitrary reference.
    CMPSS_configDAC(CMPSS1_BASE, CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    CMPSS_setDACValueHigh(CMPSS1_BASE, 2048u);
    CMPSS_setDACValueLow(CMPSS1_BASE, 500u);
    // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
    // the asynchronous comparator output.
    CMPSS_configOutputsHigh(CMPSS1_BASE, CMPSS_TRIP_ASYNC_COMP);
    CMPSS_configOutputsLow(CMPSS1_BASE, CMPSS_TRIP_ASYNC_COMP);

    // Enable CMPSS and configure the negative input signal to come from
    // the DAC
    CMPSS_enableModule(CMPSS3_BASE);
    CMPSS_configHighComparator(CMPSS3_BASE, CMPSS_INSRC_DAC);
    CMPSS_configLowComparator(CMPSS3_BASE, CMPSS_INSRC_DAC);
    // Use VDDA as the reference for the DAC and set DAC value to midpoint for
    // arbitrary reference.
    CMPSS_configDAC(CMPSS3_BASE, CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
    CMPSS_setDACValueHigh(CMPSS3_BASE, 2048u);
    CMPSS_setDACValueLow(CMPSS3_BASE, 500u);
    // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
    // the asynchronous comparator output.
    CMPSS_configOutputsHigh(CMPSS3_BASE, CMPSS_TRIP_ASYNC_COMP);
    CMPSS_configOutputsLow(CMPSS3_BASE, CMPSS_TRIP_ASYNC_COMP);
}

void ADCInit(void)
{
    // Setup VREF as internal
    ADC_setVREF(ADCA_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    ADC_setVREF(ADCB_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    ADC_setVREF(ADCC_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    // Set ADCCLK divider to /4
    ADC_setPrescaler(ADCA_BASE, ADC_CLK_DIV_4_0);
    ADC_setPrescaler(ADCB_BASE, ADC_CLK_DIV_4_0);
    ADC_setPrescaler(ADCC_BASE, ADC_CLK_DIV_4_0);
    // Set pulse positions to late
    ADC_setInterruptPulseMode(ADCA_BASE, ADC_PULSE_END_OF_CONV);
    ADC_setInterruptPulseMode(ADCB_BASE, ADC_PULSE_END_OF_CONV);
    ADC_setInterruptPulseMode(ADCC_BASE, ADC_PULSE_END_OF_CONV);
    // Power up the ADCs and then delay for 1 ms
    ADC_enableConverter(ADCA_BASE);
    ADC_enableConverter(ADCB_BASE);
    ADC_enableConverter(ADCC_BASE);
    DEVICE_DELAY_US(1000);    // 延时1ms，ADC完成初始化

    ADC_setupSOC(ADCA_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN3, 10); // IU - A3
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN3, 10); // IV - B3

    // Set SOC1 to set the interrupt 1 flag. Enable the interrupt and make
    // sure its flag is cleared.
    ADC_setInterruptSource(ADCA_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER0);
    ADC_enableInterrupt(ADCA_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1);
}

__interrupt void ADCA1_IntHandler(void)
{
    static uint32_t time_cnt = 0;

    DEVICE_DELAY_US(60);

    // LED闪烁，显示中断状态
    time_cnt++;
    if (5000u == time_cnt)
    {
        time_cnt = 0;
        GPIO_togglePin(23u);
    }

    ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}

以下是寄存器结果：