以PWM1为主，PWM2为辅，PWM2的周期、CMPA、CMPB都是跟随PMW1。更新都是在周期计数器等于0时更新。而且周期、CMPA、CMPB计算已避开周期计数器等于0附近
EPwm2Regs.EPWMXLINK.bit.TBPRDLINK = 0;
EPwm2Regs.EPWMXLINK.bit.CMPALINK = 0;
EPwm2Regs.EPWMXLINK.bit.CMPBLINK = 0;
当EPwm1Regs.CMPA.bit.CMPAHR为固定值时，变频没问题。
当EPwm1Regs.CMPA.bit.CMPAHR跟着频率变化时，变频的第一个周期会有异常，第二个周期就正常。
您好，问题不一样，我这个在HRPWM为固定值时，4路PWM1、PWM2、PWM3、PWM4 4路都能同步。
手册里写：SYNCOSEL 不能配置为1
情况1：在高分辨率下如下配置会导致变频的第一周期异常，但后面周期就同步
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EALLOW;
EPwm2Regs.EPWMXLINK.bit.TBPRDLINK = 0;
EPwm2Regs.EPWMXLINK.bit.CMPALINK = 0;
EPwm2Regs.EPWMXLINK.bit.CMPBLINK = 0;
//EPwm2Regs.GLDCTL.bit.GLDPRD=2;
EPwm2Regs.GLDCTL.bit.OSHTMODE =1;
EPwm2Regs.GLDCTL.bit.GLDMODE = 0;//0010: Load on either Counter = 0, or Counter = Period
EPwm2Regs.GLDCTL.bit.GLD = 1;
EPwm2Regs.GLDCFG.all =0x001F;
EPwm2Regs.EPWMXLINK.bit.GLDCTL2LINK = 0;//0000: ePWM1
EPwm2Regs.GLDCTL2.bit.OSHTLD =1;
EDIS;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EALLOW;
SyncSocRegs.SYNCSELECT.bit.EPWM4SYNCIN = 0;
EDIS;
EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
情况2：在高分辨率下如下配置会导致变频时 正常，但是有相位差，不同步
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EALLOW;
SyncSocRegs.SYNCSELECT.bit.EPWM4SYNCIN = 0;
EDIS;
EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
是的，低频变高频也会出现。
LLCDuty_HR = (Uint16) ((0.4)*65536);
fLLCPrd = 50000/fLLCFreq + 0.5f;
LLCPrd = (Uint16)(fLLCPrd);
LLCPrd_HR = (Uint16)((fLLCPrd-LLCPrd)*65536);
EPwm1Regs.TBPRD = LLCPrd;
EPwm1Regs.TBPRDHR =LLCPrd_HR;
EPwm1Regs.CMPA.bit.CMPA = LLCPrd/2-LLCDuty;
EPwm1Regs.CMPA.bit.CMPAHR =65536-LLCDuty_HR ;
EPwm1Regs.CMPB.bit.CMPB = LLCPrd/2+LLCDuty;
EPwm1Regs.CMPB.bit.CMPBHR = LLCDuty_HR ;
