DSP28377CMD文件中定义了".TI.ramfunc " 但是编译依旧警告

请给出完整的cmd文件，谢谢

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002

/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800

/* Part of RAMGS0 to RAMGS7, cpu1 will use this for ebss */
/* Part of RAMGS7 to RAMGS15, cpu2 will use this for ebss */
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400

CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080 // CPUx.CLA1 to CPUx MSGRAM
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080 // CPUx to CPUx.CLA1 MSGRAM
}


SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHE PAGE = 0, ALIGN(4)
.pinit : > FLASHE, PAGE = 0, ALIGN(4)
.text : >> (FLASHE | FLASHF) PAGE = 0, ALIGN(4)
mathcode : >> (FLASHE | FLASHF) PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHA,
RUN = (RAMLS0 | RAMLS1),
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#else
ramfuncs : LOAD = FLASHA,
RUN = (RAMLS0 | RAMLS1),
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif

/* Allocate uninitalized data sections: */
.stack : > RAMM0 PAGE = 1
.ebss : >> (RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7) PAGE = 1
.esysmem : >> (RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7) PAGE = 1

/* Initalized sections go in Flash */
.econst : >> (FLASHE | FLASHF) PAGE = 0, ALIGN(4)
.switch : >> (FLASHE | FLASHF) PAGE = 0, ALIGN(4)
.const : >> (FLASHE | FLASHF) PAGE = 0

.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */



#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } >> (RAMLS4 | RAMLS5), PAGE = 1

.scratchpad : >> (RAMLS4 | RAMLS5), PAGE = 1
.bss_cla : >> (RAMLS4 | RAMLS5), PAGE = 1
.const_cla : LOAD = FLASHB,
RUN = (RAMLS4 | RAMLS5),
RUN_START(_Cla1ConstRunStart),
LOAD_START(_Cla1ConstLoadStart),
LOAD_SIZE(_Cla1ConstLoadSize),
PAGE = 1
#endif //CLA_C

/* CLA specific sections */
Cla1Prog : LOAD = FLASHB,
RUN = (RAMLS2 | RAMLS3),
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0, ALIGN(4)

CLADataLS0 : >> (RAMLS4 | RAMLS5), PAGE=1
CLADataLS1 : >> (RAMLS4 | RAMLS5), PAGE=1

Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1 // CPUx.CLA1 to CPUx MSGRAM
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1 // CPUx to CPUx.CLA1 MSGRAM

SHARERAMGS0 : > CPU1TOCPU2RAM, PAGE = 1
SHARERAMGS1 : > CPU2TOCPU1RAM, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}

GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}

/* The following section definition are for SDFM examples */
// Filter_RegsFile : > RAMGS0, PAGE = 1
// Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
// Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
// Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
// Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
}

//===========================================================================
// End of file.
//===========================================================================

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHA,
.
.
.
#else
ramfuncs : LOAD = FLASHA,

您现在的__TI_COMPILER_VERSION__是如何定义的呢？您将
#else
ramfuncs : LOAD = FLASHA,

也改为.TI.ramfunc : {} LOAD = FLASHA,试一下

改过后还是一样的

若是可以的话，请您私信一下工程，谢谢

请问您现在结果如何了？在官方的例程中，是使用的如下方式