我是新手，刚学CLA模块，遇到一个问题：为什么28379D的CLA例程cla_fir32_cpu01中的任务cla1Task1只能触发一次，第二次就触发不了，而程序中是循环触发了133次?希望大佬们不吝赐教，跪谢！

user6574429

还有就是，明明程序中给CLA申请LS5作为程序空间，为什么CLA程序运行时的起始地址是LS4？是例程错了吗？

0 Susan Yang 4 年多前

TI__Guru**** 252096 points

请问您是如何调试的？能否给出相关截图？

请您先参考下：

software-dl.ti.com/.../debugging.html

software-dl.ti.com/.../getting_started.html

在cmd文件中，

RAMLS4_5 : origin = 0x00A000, length = 0x001000

/* CLA specific sections */
Cla1Prog : > RAMLS4_5, PAGE=0

关于此，您可以看一下数据手册的表 6-1. C28x Memory Map

www.ti.com.cn/.../tms320f28379d.pdf

0 user6574429 4 年多前回复 Susan Yang

Prodigy 145 points

多谢解惑，十分抱歉，我用的公司电脑，不能上传图片。。
我采用单步调试，程序采用循环的方式重发触发任务1，第一次任务1运行完成，MIRUN[0]变为0后，第二次触发任务1，对应的MIFR和MIER相应的位都置1了，且CLA处于空闲状态，但是CLA就是不会再次运行任务1.

0 user6574429 4 年多前回复 Susan Yang

Prodigy 145 points

请问在cmd文件中
RAMLS4_5 : origin = 0x00A000, length = 0x001000

/* CLA specific sections */
Cla1Prog : > RAMLS4_5, PAGE=0
对应的程序存放空间是不是LS4？但是例程中是将LS5分配位CLA的程序空间，我不清楚是例程出错了，还是我理解出错了
例程中相关程序是这样的：
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;

0 Susan Yang 4 年多前回复 user6574429

TI__Guru**** 252096 points

我测试了一下程序是可以正常运行的，如下图：

所以建议您还是按照之前链接的调试说明来调试一下

user6574429 说：
/* CLA specific sections */
Cla1Prog : > RAMLS4_5, PAGE=0
对应的程序存放空间是不是LS4？但是例程中是将LS5分配位CLA的程序空间，我不清楚是例程出错了，还是我理解出错了
例程中相关程序是这样的：
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;

参考程序内说明

    //
    // Select LS4RAM and LS5RAM to be the programming space for the CLA
    // First configure the CLA to be the master for LS4 and LS5 and then
    // set the space to be a program block
    //
    MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;
    MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1;

在cmd文件内将LS4 LS5合并了，但是在c文件内，LS4 LS5的设置是分开的，如上面的语句

其实均表示使用的地址是 RAMLS4_5定义的地址范围

0 user6574429 4 年多前回复 Susan Yang

Prodigy 145 points

你好，非常感谢你的回复，我想问一下你运行程序的时候CLA的任务1执行了多少次？我的只执行了一次就不执行了，而且例程里只有MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1;
LS5的内存分配。

0 Susan Yang 4 年多前回复 user6574429

TI__Guru**** 252096 points

clar任务执行了多次

在cla_fir32_cpu01.c的void CLA_configClaMemory(void)内的341到344行

//
// Select LS4RAM and LS5RAM to be the programming space for the CLA
// First configure the CLA to be the master for LS4 and LS5 and then
// set the space to be a program block
//
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1;

0 user6574429 4 年多前回复 Susan Yang

Prodigy 145 points

请问每次进入CLA程序都会停在__mdebugstop()吗？我的是第一次进入时停在这，然后单步调试至MSTOP后就再也没进入CLA的任务1了
但是CLA中的寄存器是这样的

0 user6574429 4 年多前回复 Susan Yang

Prodigy 145 points

您好，能分享一下CMD文件吗？我看一下是否是我的CMD文件有错？

0 Susan Yang 4 年多前回复 user6574429

TI__Guru**** 252096 points

“请问每次进入CLA程序都会停在__mdebugstop()吗？”

是的

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN           	: origin = 0x000000,   length = 0x000002
   RAMM0           	: origin = 0x000123,   length = 0x0002DD
   RAMD0           	: origin = 0x00B000,   length = 0x000800
   RAMD1            : origin = 0x00B800,   length = 0x000800
   /* RAMLS4      	    : origin = 0x00A000, length = 0x000800 */
   /* RAMLS5           : origin = 0x00A800, length = 0x000800 */
   RAMLS4_5         : origin = 0x00A000,   length = 0x001000
   RESET           	: origin = 0x3FFFC0,   length = 0x000002

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMLS0          	: origin = 0x008000,   length = 0x000800
   RAMLS1          	: origin = 0x008800,   length = 0x000800
   RAMLS2      		: origin = 0x009000,   length = 0x000800
   RAMLS3      		: origin = 0x009800,   length = 0x000800

   RAMGS0           : origin = 0x00C000,   length = 0x001000
   RAMGS1           : origin = 0x00D000,   length = 0x001000
   RAMGS2           : origin = 0x00E000,   length = 0x001000
   RAMGS3           : origin = 0x00F000,   length = 0x001000
   RAMGS4           : origin = 0x010000,   length = 0x001000
   RAMGS5           : origin = 0x011000,   length = 0x001000
   RAMGS6           : origin = 0x012000,   length = 0x001000
   RAMGS7           : origin = 0x013000,   length = 0x001000
   RAMGS8           : origin = 0x014000,   length = 0x001000
   RAMGS9           : origin = 0x015000,   length = 0x001000
   RAMGS10          : origin = 0x016000,   length = 0x001000

//   RAMGS11     : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */

//   RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMGS11          : origin = 0x017000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS12          : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS13          : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS14          : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS15          : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

//   RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
                                                            /* Only on F28379D, F28377D, F28375D devices. Remove line on other devices. */

   EMIF1_CS0n       : origin = 0x80000000, length = 0x10000000
   EMIF1_CS2n       : origin = 0x00100000, length = 0x00200000
   EMIF1_CS3n       : origin = 0x00300000, length = 0x00080000
   EMIF1_CS4n       : origin = 0x00380000, length = 0x00060000
   EMIF2_CS0n       : origin = 0x90000000, length = 0x10000000
   EMIF2_CS2n       : origin = 0x00002000, length = 0x00001000

   CANA_MSG_RAM     : origin = 0x049000,   length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000,   length = 0x000800

   CLA1_MSGRAMLOW   : origin = 0x001480,   length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500,   length = 0x000080
}

SECTIONS
{
   codestart        : > BEGIN,      PAGE = 0
   .text            : >> RAMD0 | RAMD1 | RAMLS4_5,    PAGE = 0
   .cinit           : > RAMM0,      PAGE = 0
   .switch          : > RAMM0,      PAGE = 0
   .reset           : > RESET,      PAGE = 0, TYPE = DSECT /* not used, */
   .stack           : > RAMM1,      PAGE = 1

#if defined(__TI_EABI__)
   .bss             : > RAMLS2,    PAGE = 1
   .bss:output      : > RAMLS2,    PAGE = 1
   .init_array      : > RAMM0,     PAGE = 0
   .const           : > RAMLS3,    PAGE = 1
   .data            : > RAMLS3,    PAGE = 1
   .sysmem          : > RAMLS3,    PAGE = 1
#else
   .pinit           : > RAMM0,     PAGE = 0
   .ebss            : > RAMLS2,    PAGE = 1
   .econst          : > RAMLS3,    PAGE = 1
   .esysmem         : > RAMLS3,    PAGE = 1
#endif
   Filter_RegsFile  : > RAMGS0,	    PAGE = 1

   .em1_cs0         : > EMIF1_CS0n, PAGE = 1
   .em1_cs2         : > EMIF1_CS2n, PAGE = 1
   .em1_cs3         : > EMIF1_CS3n, PAGE = 1
   .em1_cs4         : > EMIF1_CS4n, PAGE = 1
   .em2_cs0         : > EMIF2_CS0n, PAGE = 1
   .em2_cs2         : > EMIF2_CS2n, PAGE = 1

    /* CLA specific sections */
   Cla1Prog         : > RAMLS4_5, PAGE=0

   CLADataLS0		: > RAMLS0, PAGE=1
   CLADataLS1		: > RAMLS1, PAGE=1

   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

   /* The following section definition are for SDFM examples */
   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,      PAGE = 0
   #else
    ramfuncs    : > RAMM0      PAGE = 0   
   #endif
#endif

#ifdef CLA_C
   /* CLA C compiler sections */
   //
   // Must be allocated to memory the CLA has write access to
   //
   CLAscratch       :
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 1

   .scratchpad      : > RAMLS1,       PAGE = 1
   .bss_cla		    : > RAMLS1,       PAGE = 1
   .const_cla	    : > RAMLS1,       PAGE = 1
#endif //CLA_C
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

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我是新手，刚学CLA模块，遇到一个问题：为什么28379D的CLA例程cla_fir32_cpu01中的任务cla1Task1只能触发一次，第二次就触发不了，而程序中是循环触发了133次?希望大佬们不吝赐教，跪谢！