TMS320F280049C: DAC和采样问题

你好，对方工程师反馈如下，内容比较多，我就不一一翻译了，你看下：

Is HV_SENSE going directly to an ADC channel without op amp buffering?  Please note that the voltage divider consisting of R46,48,49 & 51 would form a source resistance of (510K+510K+510K)||10K for an equivalent source resistance of ~9.9K.  On top of this, there is a source capacitance of 1nF.  External RC is too high so this will require a huge SH (not sure if ACQPS register with a max value of 511 can provide the minimum required sample and hold time), but for guidance, please refer to the the section in ADC "Choosing an Acquisition Window Duration" and try to plug in these external RC values to see the minimum SH required for such an external circuit.  To increase the drive strength of the divided signal going into HV_SENSE and isolate the ADC input from the high impedance from the external RC, a strong recommendation is to use a unity gain buffer at HV_SENSE before feeding the signal to the ADC chaannel.

Now for DAC question:  Once DAC output is enabled, a DAC internal load resistor in the order of a few Kohms will be connected.  This would further complicate the input impedances that the ADC will see.  If unbuffered, the internal DAC load would be another source of input impedance and the effect of this is that the ADC sampling capacitor will never have the chance to settle to its stable value since minimum SH time as discussed in section "Choosing an Acquisition Window Duration" would change.