TMS320F280025C: controlCARDs板卡使用寄存器方式书写程序调试Lin作为Sci通信失败

库函数已经调试通过，并没有找到对应的寄存器历程，所以就改了2803x的历程，但并没有效果，查看寄存器发现无论如何发送都没有接受到任何数据

调试两天后无果，所以来论坛问问大家，希望大佬能指点一下

代码如下：

#include "F28x_Project.h" // Device Headerfile and Examples Include File

//
// Function Prototypes
//
__interrupt void Lina_Level0_ISR(void);
__interrupt void Lina_Level1_ISR(void);
void scia_fifo_init(void);
void PackTxBuffers(void);
void UnpackRxBuffers(void);
void CheckData(void);
void SetupSCI(void);
void error(void);

Uint16 sdataA[4]; // Send data for SCI-A
Uint16 rdataA[4]; // Received data for SCI-A

Uint32 LinL0IntCount; // Counter for L0 interrupts
Uint32 LinL1IntCount; // Counter for L0 interrupts

Uint32 LinL0IntVect; // Vector for L0 interrupts
Uint32 LinL1IntVect; // Vector for L1interrupts

Uint16 i; // Generic iterator

void main(void)
{
  //
  // Initialize Variables
  //
  LinL0IntCount = 0;
  LinL0IntVect = 0;
  LinL1IntCount = 0;
  LinL1IntVect = 0;

//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
//
  InitSysCtrl();

  InitGpio();
  EALLOW;

  GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; 
  GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; 

  GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; 
  GpioCtrlRegs.GPAQSEL2.bit.GPIO29 = 3; 

  GpioCtrlRegs.GPAGMUX2.bit.GPIO28 = 2;
  GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 2;
  GpioCtrlRegs.GPAGMUX2.bit.GPIO29 = 2;
  GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 2;

  EDIS;

  DINT; 

  InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
  IER = 0x0000;
  IFR = 0x0000;

  InitPieVectTable();

  EALLOW; // This is needed to write to EALLOW protected registers
  PieVectTable.LINA_0_INT = &Lina_Level0_ISR;
  PieVectTable.LINA_1_INT = &Lina_Level1_ISR;
  EDIS; // This is needed to disable write to EALLOW protected registers

  SetupSCI();

  for(i = 0; i<4; i++)
  {
    sdataA[i] = i;
  }

  EALLOW;

  PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
  PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
  PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
  IER = 0x100; // Enable CPU INT
  EINT;

  while(LinaRegs.SCIFLR.bit.IDLE == 1);

  PackTxBuffers();

  for(;;)；

}

__interrupt void Lina_Level0_ISR(void)
{
//
// Increment the interrupt counter
//
  LinL0IntCount++;

//
// Read-clear the interrupt vector
//
  LinL0IntVect = LinaRegs.SCIINTVECT0.all;

  if(LinL0IntVect == 11)
  {
//
// Move data from receive buffers to data arrays
//
    UnpackRxBuffers();

    PackTxBuffers();
  }

  else
  {

  }

  PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}

__interrupt void
Lina_Level1_ISR(void)
{
//
// Increment the interrupt counter
//
  LinL1IntCount++;

  LinL1IntVect = LinaRegs.SCIINTVECT1.all;

//
// Acknowledge the PIE to be able to receive more interrupts
//
  PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}

void
PackTxBuffers(void)
{
  LinaRegs.LINTD0.bit.TD0 = sdataA[0] >> 8;
  LinaRegs.LINTD0.bit.TD1 = sdataA[0] & 0x00FF;
  LinaRegs.LINTD0.bit.TD2 = sdataA[1] >> 8;
  LinaRegs.LINTD0.bit.TD3 = sdataA[1] & 0x00FF;
  LinaRegs.LINTD1.bit.TD4 = sdataA[2] >> 8;
  LinaRegs.LINTD1.bit.TD5 = sdataA[2] & 0x00FF;
  LinaRegs.LINTD1.bit.TD6 = sdataA[3] >> 8;
  LinaRegs.LINTD1.bit.TD7 = sdataA[3] & 0x00FF;
}

void
UnpackRxBuffers(void)
{
  Uint32 ReadData;
  ReadData = LinaRegs.LINRD0.all;
  rdataA[0] = (ReadData & 0xFFFF0000) >> 16;
  rdataA[1] = ReadData & 0x0000FFFF;
  ReadData = LinaRegs.LINRD1.all;
  rdataA[2] = (ReadData & 0xFFFF0000) >> 16;
  rdataA[3] = ReadData & 0x0000FFFF;
}

void
CheckData(void)
{
  for(i = 0; i < 4; i++)
  {
    if(sdataA[i] != rdataA[i])
    {
// error();
    }
    sdataA[i] += 4;
  }
}

void
SetupSCI(void)
{
//
// Allow write to protected registers
//
EALLOW;

LinaRegs.SCIGCR0.bit.RESET = 0; //Into reset
LinaRegs.SCIGCR0.bit.RESET = 1; //Out of reset

LinaRegs.SCIGCR1.bit.SWnRST = 0; //Into software reset

LinaRegs.SCIGCR1.bit.COMMMODE = 0; //Idle-Line Mode
LinaRegs.SCIGCR1.bit.TIMINGMODE = 1; //Asynchronous Timing
LinaRegs.SCIGCR1.bit.PARITYENA = 0; //No Parity Check
LinaRegs.SCIGCR1.bit.PARITY = 0; //Odd Parity
LinaRegs.SCIGCR1.bit.STOP = 0; //One Stop Bit
LinaRegs.SCIGCR1.bit.CLK_MASTER = 1; //Enable SCI Clock
LinaRegs.SCIGCR1.bit.LINMODE = 0; //SCI Mode
LinaRegs.SCIGCR1.bit.SLEEP = 0; //Ensure Out of Sleep
LinaRegs.SCIGCR1.bit.MBUFMODE = 0; //Buffered Mode
LinaRegs.SCIGCR1.bit.LOOPBACK = 0; //Internal Loopback
LinaRegs.SCIGCR1.bit.CONT = 1; //Continue on Suspend
LinaRegs.SCIGCR1.bit.RXENA = 1; //Enable RX
LinaRegs.SCIGCR1.bit.TXENA = 1; //Enable TX

LinaRegs.IODFTCTRL.bit.IODFTENA = 0x0;

//
// Set transmission length
//
LinaRegs.SCIFORMAT.bit.CHAR = 7; //Eight bits
LinaRegs.SCIFORMAT.bit.LENGTH = 7; //Eight bytes

LinaRegs.BRSR.bit.SCI_LIN_PSL = 0x0144; //19.2 kbps for SYSCLKOUT = 60 MHz
LinaRegs.BRSR.bit.M = 0x08;

LinaRegs.SCISETINT.bit.SETRXINT = 1; //Enable RX interrupt
LinaRegs.SCISETINT.bit.SETTXINT = 1; //Enable RX interrupt

LinaRegs.SCICLEARINTLVL.all = 0xFFFFFFFF;

LinaRegs.SCIGCR1.bit.SWnRST = 1; //bring out of software reset

EDIS;
}