在配置好CLA后发现调用EPWM4时会报错，因此更改了CMD文件中地址的大小，发现将CLA所用的地址范围加大后调用EPWM4不再报错，但是这个时候通过在线仿真可以看到duty值不再变化。在没修改CMD文件之前duty值是在变化的，修改之后虽然duty值没有变一直为0，但是我在CLA里将GPIO12拉高，通过示波器观察GPIO12确实为高电平，因此可以认为此时CLA在运行，只不过CLA中的变量duty值不变。
应该是我修改CMD文件的地址范围导致的，这个怎么解决？duty值不变是为什么？
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x0000F4, length = 0x000100C
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x001800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors: you can use FLASH for program memory when the RAM is filled up*/
/* BANK 0 */
FLASH_BANK0_SEC0 : origin = 0x080000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */
/* BANK 1 */
FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x0000F1 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMLS5 : origin = 0x00B800, length = 0x000800
RAMLS6 : origin = 0x00C000, length = 0x000800
RAMLS7 : origin = 0x00C800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x002000
RAMGS1 : origin = 0x00F000, length = 0x002000
RAMGS2 : origin = 0x011000, length = 0x002000
RAMGS3 : origin = 0x013000, length = 0x001FF8
// RAMGS3_RSVD : origin = 0x013FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
/*You can arrange the .text, .cinit, .const, .pinit, .switch and .econst to FLASH when RAM is filled up.*/
SECTIONS
{
codestart : > BEGIN, PAGE = 0
.TI.ramfunc : > RAMM0, PAGE = 0
.text : >>RAMLS0 | RAMLS2 | RAMLS3 | RAMLS4 | RAMM0, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
#if defined(__TI_EABI__)
.bss : > RAMLS5, PAGE = 1
.bss:output : > RAMLS5, PAGE = 1
.init_array : > RAMM0, PAGE = 0
.const : > RAMLS5, PAGE = 1
.data : > RAMLS5, PAGE = 1
.sysmem : > RAMLS5, PAGE = 1
.bss:cio : > RAMLS0, PAGE = 0
#else
.pinit : > RAMM0, PAGE = 0
.ebss : > RAMLS5, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
.cio : > RAMLS0, PAGE = 0
#endif
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
dclfuncs : > RAMLS5, PAGE = 1
// CLA Sections
Cla1Prog : > RAMLS1, PAGE = 0
.scratchpad : > RAMLS6, PAGE = 1
.bss_cla : > RAMLS6, PAGE = 1
.const_cla : > RAMLS6, PAGE = 1
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
Cla1DataRam : > RAMLS7, PAGE = 1
cla_shared : > RAMLS6, PAGE = 1
CLADataLS1 : > RAMLS6, PAGE = 1
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
