TMS320F28379D: TMS320F28379D

我想生成带死区互补HRPWM。死区时间为40ns,但使用高分辨率的比较A时，会对死区时间产生影响。采用利用高分辨率的DB死区，在原有的DB死区上再叠加一定的高分辨率延时，来补偿死区。但示波器测量结果发现我的死区延时实际值和理论值不符。下面是我的代码，请大家帮我找一下错误好吗？

void UserInitEpwm3()
{

    EPwm3Regs.CMPA.bit.CMPA =33; //EPWM_CMP3A;
    //EPwm3Regs.CMPB.bit.CMPB = EPWM_CMP3B;//33;
    EPwm3Regs.TBPRD = 99;              /*Time Base Period Register*/
    EPwm3Regs.CMPA.bit.CMPAHR =  12096;//EPWM_CMP3AHR;  //25*256;// 10688;
    //EPwm3Regs.CMPB.bit.CMPBHR =0; //12096;




    EPwm3Regs.TBCTL.bit.CLKDIV = 0x0;         /*Time Base Clock Pre-Scale Bits*/
    EPwm3Regs.TBCTL.bit.CTRMODE = 0x0;       /*Counter Mode*/
    EPwm3Regs.TBCTL.bit.FREE_SOFT = 0;            /*Emulation Mode Bits*/
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = 0x0;      /*High Speed Time Base Clock Pre-Scale Bits*/
    EPwm3Regs.TBCTL.bit.PHSDIR = 0x1;         /*Phase Direction Bit*/
    EPwm3Regs.TBCTL.bit.PHSEN = 0x1;           /*Counter Reg Load from Phase Reg Enable*/
    EPwm3Regs.TBCTL.bit.PRDLD = 0x1;        /*Active Period Reg Load from Shadow Select*/
    /*PWM.TBCTL.bit.SWFSYNC*/
   // EPwm3Regs.TBCTL.bit.SYNCOSEL = 0x3;     /*Sync Output Select*/
    EPwm3Regs.TBCTL.bit.SYNCOSEL =0x3;
    EPwm3Regs.TBCTR = 0;                     /*Time Base Counter Register*/
    EPwm3Regs.TBPHS.bit.TBPHS = 0;           /*Phase Offset Register*/

/*------------------------------Counter-Compare Submodule----------------------------------------*/
    EPwm3Regs.CMPCTL.bit.SHDWAMODE = 0x0;
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = 0x0;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = 0x0;
    EPwm3Regs.CMPCTL.bit.LOADBMODE = 0x0;
   // EPwm3Regs.CMPA.bit.CMPA = EPWM_CMP4A;
   // EPwm3Regs.CMPB.bit.CMPB = 0;
/*------------------------------Action-Qualifier Submodule---------------------------------------*/
    EPwm3Regs.AQCTLA.bit.ZRO= 0x2;
    EPwm3Regs.AQCTLA.bit.CAU = 0x1;
    EPwm3Regs.AQCTLB.bit.ZRO = 0x2;
    EPwm3Regs.AQCTLB.bit.CBU = 0x1;
    EPwm3Regs.AQSFRC.bit.RLDCSF = 0;
    EPwm3Regs.AQCSFRC.bit.CSFA = 0;
    EPwm3Regs.AQCSFRC.bit.CSFB = 0;
/*------------------------------Dead-Band Submodule----------------------------------------------*/
    EPwm3Regs.DBCTL.bit.HALFCYCLE   =   1;
    EPwm3Regs.DBCTL.bit.IN_MODE = 0;
    EPwm3Regs.DBCTL.bit.OUT_MODE = 0x3;
    EPwm3Regs.DBCTL.bit.POLSEL = 0x2;
    EPwm3Regs.DBFED.bit.DBFED =DB_DBFED+1;
    EPwm3Regs.DBRED.bit.DBRED = DB_DBFED;
/*------------------------------PWM-Chopper Control Submodule------------------------------------*/
 //   EPwm3Regs.PCCTL.bit.CHPEN = 0;    /*PWM-Chopping Enable*/

   EALLOW;

   EPwm3Regs.HRCNFG.all = 0x0;
   EPwm3Regs.HRCNFG.bit.EDGMODE = HR_FEP;          // MEP control on both edges
   EPwm3Regs.HRCNFG.bit.CTLMODE = HR_CMP;          // CMPAHR and TBPRDHR HR control
   EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO_PRD; // load on CTR = 0 and CTR = TBPRD
   EPwm3Regs.HRCNFG.bit.EDGMODEB = HR_FEP;          // MEP control on both edges
   EPwm3Regs.HRCNFG.bit.CTLMODEB = HR_CMP;          // CMPBHR and TBPRDHR HR control
   EPwm3Regs.HRCNFG.bit.HRLOADB  = HR_CTR_ZERO_PRD; // load on CTR = 0 and CTR = TBPRD
  //EPwm3Regs.HRCNFG.bit.AUTOCONV = 1;              // Enable autoconversion for HR period

   EPwm3Regs.HRCNFG2.bit.CTLMODEDBFED = 0x2;
   EPwm3Regs.HRCNFG2.bit.CTLMODEDBRED = 0x2;
   EPwm3Regs.HRCNFG2.bit.EDGMODEDB =   0x2;
   EPwm3Regs.DBFEDHR.bit.DBFEDHR = 39*256;


   EPwm3Regs.HRPCTL.bit.TBPHSHRLOADE = 1;          // Enable TBPHSHR sync (required for updwn count HR control)
   EPwm3Regs.HRPCTL.bit.HRPE = 1;                  // Turn on high-resolution period control.

   EPwm3Regs.TBCTL.bit.SWFSYNC = 1;                // Synchronize high resolution phase to start HR period

   EDIS;


}
interrupt void cpu_timer0_isr(void)
{

    epwm3a_integra = (long)(TB_TBPRD_DIV2 + TB_TBPRD_DIV2 * AC_MI * fSinTable[SysTick]);
    epwm3a_frac = (TB_TBPRD_DIV2 + TB_TBPRD_DIV2 * AC_MI * fSinTable[SysTick])-epwm3a_integra;
    epwm4a_integra = (long)(TB_TBPRD_DIV2 + TB_TBPRD_DIV2 * AC_MI * fSinTable[SysTick]);
    epwm4a_frac = (TB_TBPRD_DIV2 + TB_TBPRD_DIV2 * AC_MI * fSinTable[SysTick])-epwm4a_integra;


    EPWM_CMP3A =  epwm3a_integra;
    EPWM_CMP3AHR = (long)(epwm3a_frac * MEP_ScaleFactor + 0.5) <<8;
    EPWM_CMP4A =  epwm4a_integra;
    EPWM_CMP4AHR = (long)(epwm4a_frac * MEP_ScaleFactor + 0.5) <<8;


    EPWM3_DBFED = DB_DBFED + (long)(epwm3a_frac * 2);
    epwm3a_DB_frac = epwm3a_frac*2 - (long)(epwm3a_frac * 2);
    EPWM4_DBFED = DB_DBFED + (long)(epwm4a_frac * 2);
    epwm4a_DB_frac = epwm4a_frac*2 - (long)(epwm4a_frac * 2);


    EPWM3_DBFEDHR = (long)(epwm3a_DB_frac * MEP_ScaleFactor + 0.5)<<9;
    EPWM4_DBFEDHR = (long)(epwm4a_DB_frac * MEP_ScaleFactor + 0.5)<<9;


    SysTick ++;
    if(SysTick >= 1000)      SysTick = 0;

   // Acknowledge this interrupt to receive more interrupts from group 1
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE
   //CpuTimer0Regs.TCR.bit.TIF = 1;     //Clear INT SEQ1 bit
   CpuTimer0Regs.TCR.bit.TRB = 1;     //override initial value
}