TMS320F280025: 芯片的应用问题

你好，你的程序是运行在ram还是flash中的？

另外，你是根据什么说明来设计的“理论保护时间是500ns”呢？

程序运行在ram

这是datasheet的描述


我设置的CLKPRESCALE是2，SAMWIN是25，SYSCLK是100M

收到，我需要与CMPSS方面的专家沟通一下后确认问题了再回复你，还请耐心等待。

你好，有没有确保将 THRESH 加载到大于 SAMPWIN/2 的值？另外还需要在配置好之后进行 FILINT 才能正常工作。

Dear Green,你说的都做到了，没用诶.

另外这是我们cmpss--xbar--pwm的寄存器配置.

1. CMPSS configuration

#define CFG_BSP_CURR_CMPSS_FILTER_CLK_PRESCAL  1

#define CFG_BSP_IU_CMPSS_HIGH_SAMPLEWINDOW    25

//CMPSS1-input1

    // Select the value for CMPHPM[object Object]SEL.

    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1,CFG_BSP_IU_CMPSS_INPUT_NUM);

    // Select the value for CMPLPM[object Object]SEL.

    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1,CFG_BSP_IU_CMPSS_INPUT_NUM);

    CMPSS_configHighComparator(CFG_BSP_IU_CMPSS_BASE,(CMPSS_INSRC_DAC));

    // Sets the configuration for the Low comparator.

    CMPSS_configLowComparator(CFG_BSP_IU_CMPSS_BASE,(CMPSS_INSRC_DAC)| CMPSS_INV_INVERTED);

    // Sets the configuration for the internal comparator DACs.

    CMPSS_configDAC(CFG_BSP_IU_CMPSS_BASE,(CMPSS_DACVAL_SYSCLK | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW));

    // Sets the value of the internal DAC of the high comparator.

    CMPSS_setDACValueHigh(CFG_BSP_IU_CMPSS_BASE,2048 + CFG_BSP_IU_CMPSS_HIGH_VALUE);

    // Sets the value of the internal DAC of the low comparator.

    CMPSS_setDACValueLow(CFG_BSP_IU_CMPSS_BASE, 2048 - CFG_BSP_IU_CMPSS_LOW_VALUE);

    //  Configures the digital filter of the high comparator.

    CMPSS_configFilterHigh(CFG_BSP_IU_CMPSS_BASE, CFG_BSP_CURR_CMPSS_FILTER_CLK_PRESCAL, CFG_BSP_IU_CMPSS_HIGH_SAMPLEWINDOW, (CFG_BSP_IU_CMPSS_HIGH_SAMPLEWINDOW / 2) + 1u);

    // Configures the digital filter of the low comparator.

    CMPSS_configFilterLow(CFG_BSP_IU_CMPSS_BASE, CFG_BSP_CURR_CMPSS_FILTER_CLK_PRESCAL, CFG_BSP_IU_CMPSS_LOW_SAMPLEWINDOW, (CFG_BSP_IU_CMPSS_LOW_SAMPLEWINDOW / 2) + 1u);

  CMPSS_initFilterHigh(CFG_BSP_IU_CMPSS_BASE);

    CMPSS_initFilterLow(CFG_BSP_IU_CMPSS_BASE);

    CMPSS_configOutputsHigh(CFG_BSP_IU_CMPSS_BASE,(CMPSS_TRIPOUT_FILTER | CMPSS_TRIP_FILTER));

    // Sets the output signal configuration for the low comparator.

    CMPSS_configOutputsLow(CFG_BSP_IU_CMPSS_BASE, (CMPSS_TRIPOUT_FILTER | CMPSS_TRIP_FILTER));

    // Sets the comparator hysteresis settings.

    CMPSS_setHysteresis(CFG_BSP_IU_CMPSS_BASE,1U);

    CMPSS_clearFilterLatchHigh(CFG_BSP_IU_CMPSS_BASE);

    CMPSS_clearFilterLatchLow(CFG_BSP_IU_CMPSS_BASE);

    CMPSS_disableLatchResetOnPWMSYNCHigh(CFG_BSP_IU_CMPSS_BASE);

    // Disables reset of LOW comparator digital filter output latch on PWMSYNC

    CMPSS_disableLatchResetOnPWMSYNCLow(CFG_BSP_IU_CMPSS_BASE);

    // Sets the ePWM module blanking signal that holds trip in reset.

    CMPSS_configBlanking(CFG_BSP_IU_CMPSS_BASE,1U);

    // Disables an ePWM blanking signal from holding trip in reset.

    CMPSS_disableBlanking(CFG_BSP_IU_CMPSS_BASE);

    // Configures whether or not the digital filter latches are reset by PWMSYNC

CMPSS_configLatchOnPWMSYNC(CFG_BSP_IU_CMPSS_BASE,false,false);

2. XBAR configuration

 XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX00_CMPSS1_CTRIPH_OR_L);

    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX00);

    XBAR_setEPWMMuxConfig(XBAR_TRIP5, XBAR_EPWM_MUX04_CMPSS3_CTRIPH_OR_L);

    XBAR_enableEPWMMux(XBAR_TRIP5, XBAR_MUX04);

    XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX02_CMPSS2_CTRIPH_OR_L);

    XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX02);

    XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX06_CMPSS4_CTRIPH_OR_L);

XBAR_enableEPWMMux(XBAR_TRIP8, XBAR_MUX06);

3. EPWM configuration

EPWM_setTripZoneAction(EPWM1_BASE, EPWM_TZ_ACTION_EVENT_TZA,

                           EPWM_TZ_ACTION_HIGH_Z);

    // Trigger event when DCAH is high

    //

    EPWM_setTripZoneDigitalCompareEventCondition(EPWM1_BASE,

                                                 EPWM_TZ_DC_OUTPUT_A1,

                                                 EPWM_TZ_EVENT_DCXH_HIGH);

    //

    // Configure DCAH to use TRIP4  OR TRIP5 as an input

    //

    EPWM_enableDigitalCompareTripCombinationInput(EPWM1_BASE,

                                                  (EPWM_DC_COMBINATIONAL_TRIPIN4 | EPWM_DC_COMBINATIONAL_TRIPIN5

                                                  |EPWM_DC_COMBINATIONAL_TRIPIN7 | EPWM_DC_COMBINATIONAL_TRIPIN8),

                                                  EPWM_DC_TYPE_DCAH);

    // Enable DCA as OST

    //

    EPWM_enableTripZoneSignals(EPWM1_BASE, EPWM_TZ_SIGNAL_DCAEVT1);

    //

    // Configure the DCA path to be unfiltered and asynchronous

    //

    EPWM_setDigitalCompareEventSource(EPWM1_BASE,

                                      EPWM_DC_MODULE_A,

                                      EPWM_DC_EVENT_1,

                                      EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);

    EPWM_setDigitalCompareEventSyncMode(EPWM1_BASE,

                                        EPWM_DC_MODULE_A,

                                        EPWM_DC_EVENT_1,

                                        EPWM_DC_EVENT_INPUT_NOT_SYNCED);

CMPSS configuration.docx

好的，我已经反馈给工程师了，还请耐心等待回复。