TMS320F28377D: dsp float配置 FS$$DIV

he hewenwen

Prodigy 10 points

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

各位工程师大家晚上好！我想请问下如何配置dsp28377D浮点数库文件！我配置的浮点除法 FS$$DIV一直不对。

3 年多前

0 Yale Li 李耀先 3 年多前

TI__Guru 65745 points

您好，在默认安装路径安装C2000WARE后，请参考C:\ti\c2000\C2000Ware_4_01_00_00\libraries\math\FPUfastRTS\c28\docs目录下FASTRTS_SW_LIB_UG.pdf的4 Using the FPU Library，里面有详细的配置步骤。

0 he hewenwen 3 年多前回复 Yale Li 李耀先

Prodigy 10 points

您好，我按着这个配置了，但是FS$$DIV还是不能使用，您能帮助我一下吗？

0 Yale Li 李耀先 3 年多前回复 he hewenwen

TI__Guru 65745 points

您有参考哪个例程吗？

0 he hewenwen 3 年多前回复 Yale Li 李耀先

Prodigy 10 points

我参考的是您说的这个文件。然后配置了不对。这个浮点库配置需要添加.asm文件？如果您能帮我解决，我有偿付费。

0 Yale Li 李耀先 3 年多前回复 he hewenwen

TI__Guru 65745 points

我在您的另一个帖子中看到您似乎没有给fpu分配内存？

https://e2echina.ti.com/support/microcontrollers/c2000/f/c2000-microcontrollers-forum/282098/tms320f28377d-tms320f28377d

C:\ti\c2000\C2000Ware_4_01_00_00\libraries\math\FPUfastRTS\c28\examples\common\f2838x 下的 fastrts_examples_lnk.cmd 您参考一下。

您也可以把您的cmd文件发上来，我帮您看一下

0 Yale Li 李耀先 3 年多前回复 Yale Li 李耀先

TI__Guru 65745 points

不知道您的这两个问题是否相关？

0 he hewenwen 3 年多前回复 Yale Li 李耀先

Prodigy 10 points

您好，这是我的cmd文件

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MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x000000, length = 0x000002
   RAMM0            : origin = 0x000122, length = 0x0002DE
   RAMD0            : origin = 0x00B000, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002
   RAMGS45678      : origin = 0x010000, length = 0x005000
PAGE 1 :
   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN           	: origin = 0x000000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           	: origin = 0x3FFFC0, length = 0x000002
   RAMGS45678      : origin = 0x010000, length = 0x005000
PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800


   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
/*   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000 */
   RAMGS9      : origin = 0x015000, length = 0x001000
   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000
   RAMGS12     : origin = 0x018000, length = 0x001000
   RAMGS13     : origin = 0x019000, length = 0x001000
   RAMGS14     : origin = 0x01A000, length = 0x001000
   RAMGS15     : origin = 0x01B000, length = 0x001000
   
   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0
   
#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,      PAGE = 0
   #else

   #endif
#endif   
    ramfuncs         : > RAMGS45678,      PAGE = 0
   .text            : >>RAMM0 | RAMD0 |  RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0

   .cinit           : > RAMM0| RAMD0,     PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .stack           : > RAMM1,     PAGE = 1
   .ebss            : > RAMLS5,    PAGE = 1
   .econst          : > RAMLS5,    PAGE = 1
   .esysmem         : > RAMLS5,    PAGE = 1
   Filter_RegsFile  : > RAMGS0,	   PAGE = 1

   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1
   
   /* The following section definitions are required when using the IPC API Drivers */ 
    GROUP : > CPU1TOCPU2RAM, PAGE = 1 
    {
        PUTBUFFER 
        PUTWRITEIDX 
        GETREADIDX 
    }
    
    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }  
	
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

。