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TMS320F28379D: CMPSS - Ramp generator : 使用EPWM1 产生 EPWM1SYNCPER, DAC +引脚 接 1.1V,DAC -引脚 接 Ramp gen, 通过数字滤波器 输出 CRTIPOUTH 到 OUTPUTXABR 输出 ,信号一直为高 ..和预期结果完全对不上。

Part Number: TMS320F28379D

CMPSS & Ramp 配置如下:

//myCMPSS0 initialization
// Sets the configuration for the high comparator.
CMPSS_configHighComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
// Sets the configuration for the high comparator.
CMPSS_configLowComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
// Sets the configuration for the internal comparator DACs.
CMPSS_configDAC(myCMPSS0_BASE,(CMPSS_DACVAL_SYSCLK | CMPSS_DACREF_VDDA | CMPSS_DACSRC_RAMP));
// Sets the value of the internal DAC of the high comparator.
CMPSS_setDACValueHigh(myCMPSS0_BASE,0U);
// Sets the value of the internal DAC of the low comparator.
CMPSS_setDACValueLow(myCMPSS0_BASE,0U);
// Configures the digital filter of the high comparator.
CMPSS_configFilterHigh(myCMPSS0_BASE, 0U, 1U, 1U);
// Configures the digital filter of the low comparator.
CMPSS_configFilterLow(myCMPSS0_BASE, 0U, 1U, 1U);
// Initializes the digital filter of the high comparator.
CMPSS_initFilterHigh(myCMPSS0_BASE);
// Sets the output signal configuration for the high comparator.
CMPSS_configOutputsHigh(myCMPSS0_BASE,(CMPSS_TRIPOUT_FILTER | CMPSS_TRIP_FILTER));
// Sets the output signal configuration for the low comparator.
CMPSS_configOutputsLow(myCMPSS0_BASE,(CMPSS_TRIPOUT_ASYNC_COMP | CMPSS_TRIP_ASYNC_COMP));
// Sets the comparator hysteresis settings.
CMPSS_setHysteresis(myCMPSS0_BASE,0U);
// Configures the comparator subsystem's ramp generator.
CMPSS_configRamp(myCMPSS0_BASE,4000U,1U,1U,1U,true);
// Disables reset of HIGH comparator digital filter output latch on PWMSYNC
CMPSS_disableLatchResetOnPWMSYNCHigh(myCMPSS0_BASE);
// Disables reset of LOW comparator digital filter output latch on PWMSYNC
CMPSS_disableLatchResetOnPWMSYNCLow(myCMPSS0_BASE);
// Configures whether or not the digital filter latches are reset by PWMSYNC
CMPSS_configLatchOnPWMSYNC(myCMPSS0_BASE,false,false);
// Enables the CMPSS module.
CMPSS_enableModule(myCMPSS0_BASE);
// Delay for CMPSS DAC to power up.
DEVICE_DELAY_US(500);

结果如下:

channel 1  :  EPWM1SYNCPER

channel 2  :   CRTIPOUTH 到 OUTPUTXABR 输出

channel 3  :   DAC +引脚

预期结果应该是先低后高。。。 RAMPSTS 也看不到减小。