Hello, experts and colleagues, I would like to ask about the sigma-delta sampling module in chip F28377D. According to the specification, the condition of PWM11's CMPC synchronizing sdfm module is that one pwm cycle can only generate one CMPC event, what exactly does this event refer to? What would happen if there were two CMPC events. Whether the synchronization configuration of the CMPC of PWM11 to the sdfm module is the same as the event triggering configuration in ET, and whether it is affected by the synchronization configuration in ET.