28335ePWM占空比0%和100%点需要特殊设置，应该怎么实现？

请参考文献：

Using the ePWM Module for 0% - 100%Duty Cycle Control【spraai1】

计数器计数方向是上升下降计数还是上升计数还是下降计数。输出高低电平方面怎么进行set 和reset 的.

这是我用的子程序，用的是上升计数的

PWMA_below,  pwma分母

PWMA_above, pwma分子

PWMB_below, pwmb分母

PWMB_above,pwmb分子

函数是这样定义的：比如说PWMA_below=2，PWMA_above=1，那么设置的占空比是1/2

        void HRPWM1_Config(period,PWMA_below,PWMA_above,PWMB_below,PWMB_above)

{

         EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;        // set Immediate load  1

EPwm1Regs.TBPRD = period;                    // PWM frequency = 1 / period  PWM 周期=1/频率

EPwm1Regs.CMPA.half.CMPA = period / PWMA_below * (PWMA_below - PWMA_above);                  

                    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension

EPwm1Regs.CMPB = period / PWMB_below * PWMB_above;                     EPwm1Regs.TBPHS.all = 0;

EPwm1Regs.TBCTR = 0;

EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;         //计数增模式 用于非对称

EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;          // EPWM1 is the Master

EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;

EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;           //定时器选择，决定频率的范围

EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;

EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;

EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;               // PWM toggle low/high

EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;

EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;

EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;

EALLOW;

EPwm1Regs.HRCNFG.all = 0x0;

EPwm1Regs.HRCNFG.bit.EDGMODE = HR_REP; //MEP control on Rising edge

EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;

EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;

EDIS;

}

非常谢谢你这么快速的回复，我下载了文档了，很有参考价值，3Q