【求助】28027的PWM3 4输出问题

大家好，我在使用PWM1 2 3 4的时候，都同样配置成TZ1触发有效。在连接上仿真器（无进入仿真）的时候，4路输出都是正常的，但是当断开仿真器时，PWM3 4无输出，PWM1 2有输出。当将TZ部分屏蔽之后，PWM3 4可以输出。请问这个是什么问题呢？如何解决。代码如下：

// Setup Time-Base Submodule
 EPwm2Regs.TBPRD = PwmPara.TBPeriod;  // Set timer period
 EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
 EPwm2Regs.TBCTR = 0x0000;    // Clear counter

 EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
 EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;   //
 EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
 EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
 EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;       // Clock ratio to SYSCLKOUT
 EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
 EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP;

 // Setup Counter-Compare Submodule
 EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
 EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE; 
 EPwm2Regs.CMPA.half.CMPA = 0;
 EPwm2Regs.CMPB = 0;

 EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
 EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; 
 EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;  // Load on Zero
 EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

 EPwm2Regs.CMPA.half.CMPA = 0;   // Set compare A shadow value to 0% duty
 EPwm2Regs.CMPB = 0;       // Set Compare B shadow value to 0% duty

 // Set Action-Qualifier Submodule
 EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;
 EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;
 EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
 EPwm2Regs.AQCTLA.bit.CAD = AQ_SET;
 EPwm2Regs.AQCTLA.bit.CBU = AQ_NO_ACTION;
 EPwm2Regs.AQCTLA.bit.CBD = AQ_NO_ACTION;

 EPwm2Regs.AQCTLB.bit.ZRO = AQ_NO_ACTION;
 EPwm2Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;
 EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR;
 EPwm2Regs.AQCTLB.bit.CAD = AQ_SET;
 EPwm2Regs.AQCTLB.bit.CBU = AQ_NO_ACTION;
 EPwm2Regs.AQCTLB.bit.CBD = AQ_NO_ACTION;

 EPwm2Regs.AQSFRC.bit.ACTSFA = AQ_NO_ACTION;
 EPwm2Regs.AQSFRC.bit.ACTSFB = AQ_NO_ACTION;

 EPwm2Regs.AQSFRC.bit.RLDCSF = AQ_LD_IMM;   //
 EPwm2Regs.AQCSFRC.bit.CSFA = AQ_CSF_LOW; //
 EPwm2Regs.AQCSFRC.bit.CSFB = AQ_CSF_LOW;

 // Setup Dead-Band Generator Submodule
 EPwm2Regs.DBCTL.bit.IN_MODE = DBA_ALL;   //***
 EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;  //***
 EPwm2Regs.DBCTL.bit.OUT_MODE = DB_DISABLE;  //***

 EPwm2Regs.DBRED = 2;
 EPwm2Regs.DBFED = 2;

 // Setup PWM-Chopper Submodule
 EPwm2Regs.PCCTL.all = 0x0000;   // PC is bypass

 // Setup Trip-Zone Submodule
 EALLOW();
 EPwm2Regs.TZSEL.all = 0x0000;
 EPwm2Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // Enable TZ1 as one shot trip source

 EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_LO;
 EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO;

 EPwm2Regs.TZCLR.bit.OST = 1;
 EPwm2Regs.TZCLR.bit.CBC = 1;
 EPwm2Regs.TZCLR.bit.INT = 1;
// EPwm2Regs.TZEINT.bit.OST = TZ_ENABLE; // Enable TZ interrupt
 EDIS();

 // Interrupt where we will change the Compare Values
 //EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_PRD;   // Select INT on Zero event
 //EPwm2Regs.ETSEL.bit.INTEN = 1;     // Enable INT
 //EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;    // Generate INT on 1 event
 EPwm2Regs.ETSEL.all = 0x0000;
 EPwm2Regs.ETPS.all = 0x0000;