Original question:
我在28335配置完EPWM后(没配置对应的GPIO，在后面统一配置)，
再配置其他ADC外设，
最后配置GPIO
所有的GPIO上拉，再配置GPIO复用，PWM GPIO会有一段10us左右的输出，
但配置GPIO上拉和GPIO复用放在一起配置却没有了，这是什么原因？
原配置：
sInitFlash();
// Step 2. Initialize EPWM registers for the specific application
//InitEPwmTimer();
sInitEPWM();
// Step 6. IDLE loop. Just sit and loop forever (optional):
sInitECAP();
//sInitFlash();
// Step 3. Initialize AD registers
sInitAdc();
// Step 4. Select GPIO for the device or for the specific application:
sInitGpio();//在此处出现 PWM GPIO会有一段10us左右的输出
//----------------------------------EPWM配置---------------------
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
EDIS;
//ePWM1 // configure to i/o port in inverter application
EALLOW;
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO;
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; //force low
EDIS;
EPwm1Regs.TBPRD = cFanSpeedPeriod;
EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.CLKDIV = CHP_DIV1; // TBCLK = SYSCLKOUT / (HSPCLKDIV*CLKDIV)
EPwm1Regs.TBCTL.bit.HSPCLKDIV = CHP_DIV1; //=100M/(1*1)
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // up-down mode
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; //Do not load the time-base counter (TBCTR) from the time-base phase register (TBPHS)
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; //loaded the TBPRD from shadow register when TBCTR is equal to zero
//EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE; //load the TBPRD immediately preriod interrupt couldn't take palce?
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; // Disable EPWMxSYNCO signal
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //load CMPA from shadow register
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; //load CMPA on CTR=period
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.AQCTLA.all = 0x0555; //EPWM1A always low,modify it when control start
EPwm1Regs.AQCTLB.all = 0x0555; //EPWM1B always low
EPwm1Regs.CMPA.half.CMPA = 0xFFFF;
EPwm1Regs.CMPB = 0xFFFF;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_DISABLE; //disable DB first,enable it when control start
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
EPwm1Regs.DBFED = 450;
EPwm1Regs.DBRED = 450;
EPwm1Regs.ETPS.bit.INTCNT = 0;
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; //first envent trigger
// EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE; //enable PWM int
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; //Enable event time-base counter equal to zero.
//EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; //Enable event time-base counter equal to period
EPwm1Regs.ETCLR.bit.INT = 1; //Clears the ETFLG[INT] flag bit
// EPwm1Regs.ETSEL.bit.SOCAEN = 1;
// EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD;
// EPwm1Regs.ETPS.bit.SOCACNT = ET_1ST;
// EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST;
EPwm1Regs.AQCTLA.all = 0;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.CMPA.half.CMPA = cFanSpeedPeriod;
EPwm1Regs.AQCTLB.all = 0;
EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EPwm1Regs.CMPB = cFanSpeedPeriod;
//----------------------------------GPIO配置---------------------
void sInitGpio(void)
{
EALLOW;
// Enable PWM1-5 on GPIO0-GPIO9
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pullup on GPIO0
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pullup on GPIO1
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pullup on GPIO2
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pullup on GPIO3
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0; // Enable pullup on GPIO4
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pullup on GPIO5
GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pullup on GPIO6
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pullup on GPIO7
GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0; // Enable pullup on GPIO8
GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pullup on GPIO9
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pullup on GPIO10
GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pullup on GPIO11
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO12
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pullup on GPIO13
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pullup on GPIO14
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pullup on GPIO15
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pullup on GPIO16
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pullup on GPIO17
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pullup on GPIO18
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pullup on GPIO19
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pullup on GPIO20
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pullup on GPIO21
GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pullup on GPIO22
GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pullup on GPIO23
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pullup on GPIO24
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Enable pullup on GPIO25
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; // Enable pullup on GPIO26
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // Enable pullup on GPIO27
GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; // Enable pullup on GPIO28
GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; // Enable pullup on GPIO29
GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pullup on GPIO30
GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; // Enable pullup on GPIO31
GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pullup on GPIO32
GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pullup on GPIO33
GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pullup on GPIO34
GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0; // Enable pullup on GPIO35
GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0; // Enable pullup on GPIO36
GpioCtrlRegs.GPBPUD.bit.GPIO37 = 0; // Enable pullup on GPIO37
GpioCtrlRegs.GPBPUD.bit.GPIO38 = 0; // Enable pullup on GPIO38
GpioCtrlRegs.GPBPUD.bit.GPIO39 = 0; // Enable pullup on GPIO39
GpioCtrlRegs.GPBPUD.bit.GPIO40 = 0; // Enable pullup on GPIO40
GpioCtrlRegs.GPBPUD.bit.GPIO41 = 0; // Enable pullup on GPIO41
GpioCtrlRegs.GPBPUD.bit.GPIO42 = 0; // Enable pullup on GPIO42
GpioCtrlRegs.GPBPUD.bit.GPIO43 = 0; // Enable pullup on GPIO43
GpioCtrlRegs.GPBPUD.bit.GPIO44 = 0; // Enable pullup on GPIO44
GpioCtrlRegs.GPBPUD.bit.GPIO45 = 0; // Enable pullup on GPIO45
GpioCtrlRegs.GPBPUD.bit.GPIO46 = 0; // Enable pullup on GPIO46
GpioCtrlRegs.GPBPUD.bit.GPIO47 = 0; // Enable pullup on GPIO47
GpioCtrlRegs.GPBPUD.bit.GPIO48 = 0; // Enable pullup on GPIO48
GpioCtrlRegs.GPBPUD.bit.GPIO49 = 0; // Enable pullup on GPIO49
GpioCtrlRegs.GPBPUD.bit.GPIO50 = 0; // Enable pullup on GPIO50
GpioCtrlRegs.GPBPUD.bit.GPIO51 = 0; // Enable pullup on GPIO51
GpioCtrlRegs.GPBPUD.bit.GPIO52 = 0; // Enable pullup on GPIO52
GpioCtrlRegs.GPBPUD.bit.GPIO53 = 0; // Enable pullup on GPIO53
GpioCtrlRegs.GPBPUD.bit.GPIO54 = 0; // Enable pullup on GPIO55
GpioCtrlRegs.GPBPUD.bit.GPIO55 = 0; // Enable pullup on GPIO55
GpioCtrlRegs.GPBPUD.bit.GPIO56 = 0; // Enable pullup on GPIO56
GpioCtrlRegs.GPBPUD.bit.GPIO57 = 0; // Enable pullup on GPIO57
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pullup on GPIO58
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pullup on GPIO59
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // Enable pullup on GPIO60
GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; // Enable pullup on GPIO61
GpioCtrlRegs.GPBPUD.bit.GPIO62 = 0; // Enable pullup on GPIO62
GpioCtrlRegs.GPBPUD.bit.GPIO63 = 0; // Enable pullup on GPIO63
GpioCtrlRegs.GPCPUD.bit.GPIO64 = 0; // Enable pullup on GPIO64
GpioCtrlRegs.GPCPUD.bit.GPIO65 = 0; // Enable pullup on GPIO65
GpioCtrlRegs.GPCPUD.bit.GPIO66 = 0; // Enable pullup on GPIO66
GpioCtrlRegs.GPCPUD.bit.GPIO67 = 0; // Enable pullup on GPIO67
GpioCtrlRegs.GPCPUD.bit.GPIO68 = 0; // Enable pullup on GPIO68
GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0; // Enable pullup on GPIO69
GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0; // Enable pullup on GPIO70
GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0; // Enable pullup on GPIO71
GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0; // Enable pullup on GPIO72
GpioCtrlRegs.GPCPUD.bit.GPIO73 = 0; // Enable pullup on GPIO73
GpioCtrlRegs.GPCPUD.bit.GPIO74 = 0; // Enable pullup on GPIO74
GpioCtrlRegs.GPCPUD.bit.GPIO75 = 0; // Enable pullup on GPIO75
GpioCtrlRegs.GPCPUD.bit.GPIO76 = 0; // Enable pullup on GPIO76
GpioCtrlRegs.GPCPUD.bit.GPIO77 = 0; // Enable pullup on GPIO77
GpioCtrlRegs.GPCPUD.bit.GPIO78 = 0; // Enable pullup on GPIO78
GpioCtrlRegs.GPCPUD.bit.GPIO79 = 0; // Enable pullup on GPIO79
GpioCtrlRegs.GPCPUD.bit.GPIO80 = 0; // Enable pullup on GPIO80
GpioCtrlRegs.GPCPUD.bit.GPIO81 = 0; // Enable pullup on GPIO81
GpioCtrlRegs.GPCPUD.bit.GPIO82 = 0; // Enable pullup on GPIO82
GpioCtrlRegs.GPCPUD.bit.GPIO83 = 0; // Enable pullup on GPIO83
GpioCtrlRegs.GPCPUD.bit.GPIO84 = 0; // Enable pullup on GPIO84
GpioCtrlRegs.GPCPUD.bit.GPIO85 = 0; // Enable pullup on GPIO85
GpioCtrlRegs.GPCPUD.bit.GPIO86 = 0; // Enable pullup on GPIO86
GpioCtrlRegs.GPCPUD.bit.GPIO87 = 0; // Enable pullup on GPIO87
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
// GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
//GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO2 = PWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO3 = PWM2B
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // GPIO4 = PWM3A
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // GPIO5 = PWM3B
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; // GPIO6 = PWM4A
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1; // GPIO7 = PWM4B
GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; // GPIO8 = PWM5A
GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1; // GPIO9 = PWM5B
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // GPIO10 = PWM6A
GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1; // GPIO11 = PWM6B
EDIS;
}
修改GPIO的配置顺序后就没有了
////----------------------------------GPIO配置---------------------
void sInitGpio(void)
{
EALLOW;
// Enable PWM1-5 on GPIO0-GPIO9
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pullup on GPIO0
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pullup on GPIO1
//GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pullup on GPIO2
//GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO2 = PWM2A
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pullup on GPIO3
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO3 = PWM2B
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0; // Enable pullup on GPIO4
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // GPIO4 = PWM3A
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pullup on GPIO5
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // GPIO5 = PWM3B
GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pullup on GPIO6
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; // GPIO6 = PWM4A
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pullup on GPIO7
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1; // GPIO7 = PWM4B
GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0; // Enable pullup on GPIO8
GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; // GPIO8 = PWM5A
GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pullup on GPIO9
GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1; // GPIO9 = PWM5B
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pullup on GPIO10
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // GPIO10 = PWM6A
GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pullup on GPIO11
GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1; // GPIO11 = PWM6B
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO12
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pullup on GPIO13
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pullup on GPIO14
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pullup on GPIO15
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pullup on GPIO16
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pullup on GPIO17
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pullup on GPIO18
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pullup on GPIO19
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pullup on GPIO20
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pullup on GPIO21
GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pullup on GPIO22
GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pullup on GPIO23
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pullup on GPIO24
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Enable pullup on GPIO25
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; // Enable pullup on GPIO26
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // Enable pullup on GPIO27
GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; // Enable pullup on GPIO28
GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; // Enable pullup on GPIO29
GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pullup on GPIO30
GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; // Enable pullup on GPIO31
GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pullup on GPIO32
GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pullup on GPIO33
GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pullup on GPIO34
GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0; // Enable pullup on GPIO35
GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0; // Enable pullup on GPIO36
GpioCtrlRegs.GPBPUD.bit.GPIO37 = 0; // Enable pullup on GPIO37
GpioCtrlRegs.GPBPUD.bit.GPIO38 = 0; // Enable pullup on GPIO38
GpioCtrlRegs.GPBPUD.bit.GPIO39 = 0; // Enable pullup on GPIO39
GpioCtrlRegs.GPBPUD.bit.GPIO40 = 0; // Enable pullup on GPIO40
GpioCtrlRegs.GPBPUD.bit.GPIO41 = 0; // Enable pullup on GPIO41
GpioCtrlRegs.GPBPUD.bit.GPIO42 = 0; // Enable pullup on GPIO42
GpioCtrlRegs.GPBPUD.bit.GPIO43 = 0; // Enable pullup on GPIO43
GpioCtrlRegs.GPBPUD.bit.GPIO44 = 0; // Enable pullup on GPIO44
GpioCtrlRegs.GPBPUD.bit.GPIO45 = 0; // Enable pullup on GPIO45
GpioCtrlRegs.GPBPUD.bit.GPIO46 = 0; // Enable pullup on GPIO46
GpioCtrlRegs.GPBPUD.bit.GPIO47 = 0; // Enable pullup on GPIO47
GpioCtrlRegs.GPBPUD.bit.GPIO48 = 0; // Enable pullup on GPIO48
GpioCtrlRegs.GPBPUD.bit.GPIO49 = 0; // Enable pullup on GPIO49
GpioCtrlRegs.GPBPUD.bit.GPIO50 = 0; // Enable pullup on GPIO50
GpioCtrlRegs.GPBPUD.bit.GPIO51 = 0; // Enable pullup on GPIO51
GpioCtrlRegs.GPBPUD.bit.GPIO52 = 0; // Enable pullup on GPIO52
GpioCtrlRegs.GPBPUD.bit.GPIO53 = 0; // Enable pullup on GPIO53
GpioCtrlRegs.GPBPUD.bit.GPIO54 = 0; // Enable pullup on GPIO55
GpioCtrlRegs.GPBPUD.bit.GPIO55 = 0; // Enable pullup on GPIO55
GpioCtrlRegs.GPBPUD.bit.GPIO56 = 0; // Enable pullup on GPIO56
GpioCtrlRegs.GPBPUD.bit.GPIO57 = 0; // Enable pullup on GPIO57
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pullup on GPIO58
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pullup on GPIO59
//GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // Enable pullup on GPIO60
//GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; // Enable pullup on GPIO61
GpioCtrlRegs.GPBPUD.bit.GPIO62 = 0; // Enable pullup on GPIO62
GpioCtrlRegs.GPBPUD.bit.GPIO63 = 0; // Enable pullup on GPIO63
GpioCtrlRegs.GPCPUD.bit.GPIO64 = 0; // Enable pullup on GPIO64
GpioCtrlRegs.GPCPUD.bit.GPIO65 = 0; // Enable pullup on GPIO65
GpioCtrlRegs.GPCPUD.bit.GPIO66 = 0; // Enable pullup on GPIO66
GpioCtrlRegs.GPCPUD.bit.GPIO67 = 0; // Enable pullup on GPIO67
GpioCtrlRegs.GPCPUD.bit.GPIO68 = 0; // Enable pullup on GPIO68
GpioCtrlRegs.GPCPUD.bit.GPIO69 = 0; // Enable pullup on GPIO69
GpioCtrlRegs.GPCPUD.bit.GPIO70 = 0; // Enable pullup on GPIO70
GpioCtrlRegs.GPCPUD.bit.GPIO71 = 0; // Enable pullup on GPIO71
GpioCtrlRegs.GPCPUD.bit.GPIO72 = 0; // Enable pullup on GPIO72
GpioCtrlRegs.GPCPUD.bit.GPIO73 = 0; // Enable pullup on GPIO73
GpioCtrlRegs.GPCPUD.bit.GPIO74 = 0; // Enable pullup on GPIO74
GpioCtrlRegs.GPCPUD.bit.GPIO75 = 0; // Enable pullup on GPIO75
GpioCtrlRegs.GPCPUD.bit.GPIO76 = 0; // Enable pullup on GPIO76
GpioCtrlRegs.GPCPUD.bit.GPIO77 = 0; // Enable pullup on GPIO77
GpioCtrlRegs.GPCPUD.bit.GPIO78 = 0; // Enable pullup on GPIO78
GpioCtrlRegs.GPCPUD.bit.GPIO79 = 0; // Enable pullup on GPIO79
GpioCtrlRegs.GPCPUD.bit.GPIO80 = 0; // Enable pullup on GPIO80
GpioCtrlRegs.GPCPUD.bit.GPIO81 = 0; // Enable pullup on GPIO81
GpioCtrlRegs.GPCPUD.bit.GPIO82 = 0; // Enable pullup on GPIO82
GpioCtrlRegs.GPCPUD.bit.GPIO83 = 0; // Enable pullup on GPIO83
GpioCtrlRegs.GPCPUD.bit.GPIO84 = 0; // Enable pullup on GPIO84
GpioCtrlRegs.GPCPUD.bit.GPIO85 = 0; // Enable pullup on GPIO85
GpioCtrlRegs.GPCPUD.bit.GPIO86 = 0; // Enable pullup on GPIO86
GpioCtrlRegs.GPCPUD.bit.GPIO87 = 0; // Enable pullup on GPIO87
EDIS;
}
