Part Number: TMS320F28035
我的28035在还没发波前epwm2a和epwm3a输出的是高电平,这样会导致开关同时导通而短路,我想让pwm波形在初始状态(未通电)时是低电平,应该怎么操作呢,谢谢
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Part Number: TMS320F28035
我的28035在还没发波前epwm2a和epwm3a输出的是高电平,这样会导致开关同时导通而短路,我想让pwm波形在初始状态(未通电)时是低电平,应该怎么操作呢,谢谢
void InitEPwm2(void)
{
EPwm2Regs.TBPRD = TB_PERIOD;
EPwm2Regs.CMPA.half.CMPA = DUTY_VALUE;
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm2A
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
// EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR; // set actions for EPwm2A
// EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
// Interrupt where we will change the Compare Values
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm2Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBFED = DB_VALUE; // FED = 300 TBCLKs initially
EPwm2Regs.DBRED = DB_VALUE; // RED = 300 TBCLKs initially
}
void InitEPwm3(void)
{
EPwm3Regs.TBPRD = TB_PERIOD; // Period = 15000 TBCLK counts
EPwm3Regs.CMPA.half.CMPA = DUTY_VALUE;
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero initially
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module
EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
// EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR; // set actions for EPwm3A
// EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm3A
EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
// Interrupt where we will change the Compare Values
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm3Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm3Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBFED = DB_VALUE; // FED = 30 TBCLKs initially
EPwm3Regs.DBRED = DB_VALUE; // RED = 40 TBCLKs initially
// Run Time (Note: Example execution of one run-time instant)
//============================================================
EPwm3Regs.TBPHS.half.TBPHS = TB_PERIOD / 2;
// EPwm3Regs.TBPHS.half.TBPHS = 15000 - yixiangjiao; // Set Phase reg to 300/1200 * 360 = 90 deg
// EPwm3Regs.DBFED = FED2_NewValue; // Update ZVS transition interval
// EPwm3Regs.DBRED = RED2_NewValue; // Update ZVS transition interval
}
这是我pwm2和pwm3的配置代码,基本上一样,只是pwm3有一半周期的位移
你好,我的IO口配置如下:
//
// InitEPwm2Gpio - This function initializes GPIO pins to function as EPwm2
//
void
InitEPwm2Gpio(void)
{
EALLOW;
//
// Disable internal pull-up for the selected output pins
// for reduced power consumption
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
//
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; // Disable pull-up on GPIO2 (EPWM2A)
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1; // Disable pull-up on GPIO3 (EPWM2B)
//
// Configure EPwm-2 pins using GPIO regs
// This specifies which of the possible GPIO pins will be
// EPWM2 functional pins.
// Comment out other unwanted lines.
//
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // Configure GPIO2 as EPWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // Configure GPIO3 as EPWM2B
EDIS;
}
//
// InitEPwm3Gpio - This function initializes GPIO pins to function as EPwm3
//
void
InitEPwm3Gpio(void)
{
EALLOW;
// Disable internal pull-up for the selected output pins
// for reduced power consumption
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
//
GpioCtrlRegs.GPAPUD.bit.GPIO4 = 1; // Disable pull-up on GPIO4 (EPWM3A)
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1; // Disable pull-up on GPIO5 (EPWM3B)
//
// Configure EPwm-3 pins using GPIO regs
// This specifies which of the possible GPIO pins will be
// EPWM3 functional pins.
// Comment out other unwanted lines.
//
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // Configure GPIO4 as EPWM3A
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // Configure GPIO5 as EPWM3B
EDIS;
}
就是把GUAPUD和GPAMUX都设置为1,是否需要修改?谢谢
你好,GPIO应该没问题。你这里设置了couznter 等于0的时候置位,尝试将其改成清零。
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;
不是的,把
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET
改成
EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR
void InitEPwm2(void)
{
EPwm2Regs.TZFRC.bit.OST = 1;
EPwm2Regs.TZCLR.all = 0*3F;
EPwm2Regs.TBPRD = TB_PERIOD;
EPwm2Regs.CMPA.half.CMPA = DUTY_VALUE;
EPwm2Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
// EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm2A
// EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
// EPwm2Regs.AQCSFRC.bit.CSFA = 0;
// Interrupt where we will change the Compare Values
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm2Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm2Regs.DBFED = DB_VALUE; // FED = 300 TBCLKs initially
EPwm2Regs.DBRED = DB_VALUE; // RED = 300 TBCLKs initially
}
void InitEPwm3(void)
{
EPwm3Regs.TZFRC.bit.OST = 1;
EPwm3Regs.TZCLR.all = 0*3F;
EPwm3Regs.TBPRD = TB_PERIOD; // Period = 15000 TBCLK counts
EPwm3Regs.CMPA.half.CMPA = DUTY_VALUE;
EPwm3Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero initially
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module
EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
// EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPwm3A
// EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;
// EPwm3Regs.AQCSFRC.bit.CSFA = 0;
// Interrupt where we will change the Compare Values
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm3Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm3Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
EPwm3Regs.DBFED = DB_VALUE; // FED = 30 TBCLKs initially
EPwm3Regs.DBRED = DB_VALUE; // RED = 40 TBCLKs initially
// Run Time (Note: Example execution of one run-time instant)
//============================================================
EPwm3Regs.TBPHS.half.TBPHS = TB_PERIOD / 2;
// EPwm3Regs.TBPHS.half.TBPHS = 15000 - yixiangjiao; // Set Phase reg to 300/1200 * 360 = 90 deg
// EPwm3Regs.DBFED = FED2_NewValue; // Update ZVS transition interval
// EPwm3Regs.DBRED = RED2_NewValue; // Update ZVS transition interval
}
你好,是像这样,在epwm2和epwm3配置的第一航添加您说的代码进去吗,谢谢