interrupt void epwm1_isr(void);
void EPwm1Set();
void EPwm2Set();
void EPwm3Set();
void AdcSet();
void AdcResults();
void abtodq(float vain,float vbin,float wtin);
void dqtoab(float vdin,float vqin,float wtin);
void main()
{
InitSysCtrl(); //系统初始化，PLL, WatchDog, enable Peripheral Clocks
EALLOW;
SysCtrlRegs.HISPCP.all = 0x3; //HSPCLK = SYSCLKOUT/2*3 = 150/(2*3) = 25.0 MHz
EDIS;
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.EPWM1_INT = &epwm1_isr;
EDIS;
for(s=0;s<200;++s)
{
view_A[s]=0;
view_B[s]=0;
view_C[s]=0;
};
for(t=0;t<lengh;++t)
{
filter_va[t]=0;
filter_vb[t]=0;
filter_vc[t]=0;
};
InitAdc();
EPwm1Set();
EPwm2Set();
EPwm3Set();
AdcSet();
InitPID();
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
IER |= M_INT3;
EINT;
ERTM;
GpioDataRegs.GPBDAT.bit.GPIO60 = 0; //初始化LED
while(1)
{
AdcResults();
}
}
void EPwm1Set() //A相
{
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
EPwm1Regs.TBPRD = 7500;
EPwm1Regs.TBPHS.half.TBPHS = 0x0000;
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.TBCTL.bit.CTRMODE = 0x2;
EPwm1Regs.TBCTL.bit.PHSEN = 0;
EPwm1Regs.TBCTL.bit.PRDLD = 0;
EPwm1Regs.TBCTL.bit.SYNCOSEL = 0x3;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0x0;
EPwm1Regs.TBCTL.bit.CLKDIV = 0x0;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;
EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
EPwm1Regs.CMPA.half.CMPA = 0;
EPwm1Regs.CMPB =0;
EPwm1Regs.AQCTLA.bit.CAU = 0x2;
EPwm1Regs.AQCTLA.bit.CAD = 0x1;
EPwm1Regs.DBCTL.bit.IN_MODE = 0x0;
EPwm1Regs.DBCTL.bit.POLSEL = 0x2;
EPwm1Regs.DBCTL.bit.OUT_MODE = 0x3;
EPwm1Regs.DBFED = 0x12C;
EPwm1Regs.DBRED = 0x12C;
EPwm1Regs.ETSEL.bit.INTSEL = 0x1;
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETPS.bit.INTPRD = 0x1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
}
void EPwm2Set() //B相
{
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
EPwm2Regs.TBPRD = 7500;
EPwm2Regs.TBPHS.half.TBPHS = 0x0000;
EPwm2Regs.TBCTR = 0x0000;
EPwm2Regs.TBCTL.bit.CTRMODE = 0x2;
EPwm2Regs.TBCTL.bit.PHSEN = 0;
EPwm2Regs.TBCTL.bit.PRDLD = 0;
EPwm2Regs.TBCTL.bit.SYNCOSEL = 0x3;
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0x0;
EPwm2Regs.TBCTL.bit.CLKDIV = 0x0;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = 0;
EPwm2Regs.CMPCTL.bit.LOADAMODE = 0;
EPwm2Regs.CMPA.half.CMPA = 0;
EPwm2Regs.CMPB =0;
EPwm2Regs.AQCTLA.bit.CAU = 0x2;
EPwm2Regs.AQCTLA.bit.CAD = 0x1;
EPwm2Regs.DBCTL.bit.IN_MODE = 0x0;
EPwm2Regs.DBCTL.bit.POLSEL = 0x2;
EPwm2Regs.DBCTL.bit.OUT_MODE = 0x3;
EPwm2Regs.DBFED = 0x12C;
EPwm2Regs.DBRED = 0x12C;
EPwm2Regs.ETSEL.bit.INTSEL = 0x1;
EPwm2Regs.ETSEL.bit.INTEN = 0;
EPwm2Regs.ETPS.bit.INTPRD = 0x1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
}
void EPwm3Set() //C相
{
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
EPwm3Regs.TBPRD = 7500;
EPwm3Regs.TBPHS.half.TBPHS = 0x0000;
EPwm3Regs.TBCTR = 0x0000;
EPwm3Regs.TBCTL.bit.CTRMODE = 0x2;
EPwm3Regs.TBCTL.bit.PHSEN = 0;
EPwm3Regs.TBCTL.bit.PRDLD = 0;
EPwm3Regs.TBCTL.bit.SYNCOSEL = 0x3;
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 0x0;
EPwm3Regs.TBCTL.bit.CLKDIV = 0x0;
EPwm3Regs.CMPCTL.bit.SHDWAMODE = 0;
EPwm3Regs.CMPCTL.bit.LOADAMODE = 0;
EPwm3Regs.CMPA.half.CMPA = 0;
EPwm3Regs.CMPB =0;
EPwm3Regs.AQCTLA.bit.CAU = 0x2;
EPwm3Regs.AQCTLA.bit.CAD = 0x1;
EPwm3Regs.DBCTL.bit.IN_MODE = 0x0;
EPwm3Regs.DBCTL.bit.POLSEL = 0x2;
EPwm3Regs.DBCTL.bit.OUT_MODE = 0x3;
EPwm3Regs.DBFED = 0x12C;
EPwm3Regs.DBRED = 0x12C;
EPwm3Regs.ETSEL.bit.INTSEL = 0x1;
EPwm3Regs.ETSEL.bit.INTEN = 0;
EPwm3Regs.ETPS.bit.INTPRD = 0x1;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
}
void AdcSet()
{
AdcRegs.ADCTRL1.bit.ACQ_PS = 0xF;
AdcRegs.ADCTRL1.bit.SUSMOD = 0x3;
AdcRegs.ADCTRL3.bit.ADCCLKPS = 0x1;
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 2;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
AdcRegs.ADCTRL1.bit.CONT_RUN = 1;
AdcRegs.ADCTRL1.bit.SEQ_OVRD = 0;
AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 1;
}
void AdcResults()
{
float va_1,vb_1,vc_1;
va_1 = AdcRegs.ADCRESULT0 >>4;
vb_1 = AdcRegs.ADCRESULT1 >>4;
vc_1 = AdcRegs.ADCRESULT2 >>4;
va_1 = (va_1-1890)*1500/4095;
vb_1 = (vb_1-1880)*1500/4095;
vc_1 = (vc_1-2010)*1500/4095;
t++;
if(t>=lengh)
t=0;
va = va+(va_1-filter_va[t])/lengh;
vb = vb+(vb_1-filter_vb[t])/lengh;
vc = vc+(vc_1-filter_vc[t])/lengh;
}
interrupt void epwm1_isr(void)
{
......
s++;
if(s>=200)
s=0;
view_A[s] = va;
view_B[s] = vb;
view_C[s] = vc;
......
EPwm1Regs.CMPA.half.CMPA = cmpa_A;
EPwm2Regs.CMPA.half.CMPA = cmpa_B;
EPwm3Regs.CMPA.half.CMPA = cmpa_C;
EPwm1Regs.ETCLR.bit.INT = 1;
// PieCtrlRegs.PIEACK.bit.ACK3 = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
