28335的mcbsp模拟spi驱动AD7606，读出数据始终是0

用28335的mcbsp模拟spi驱动AD7606

这是用自带spi读数据的程序，好使

#define DUMMYDATA 0x5a5a

int16 AD7606_Get_Word(void)

{

    int16 rdata;

    SpiaRegs.***.bit.TALK = 0;              // 禁止发送功能

    SpiaRegs.SPITXBUF = DUMMYDATA;

    while(SpiaRegs.SPIFFRX.bit.RXFFST == 0 ) {};          //等待接收数据

    rdata = SpiaRegs.SPIRXBUF;

    return  rdata;

}

这是mcbsp读数据的程序

int16 Mcbsp_Get_Word(void)

{

    int16 rdata;

    CS_L();

        McbspaRegs.DXR1.all= 0x00;

    while( McbspaRegs.SPCR1.bit.RRDY == 0 ) {}         // Master waits until RX data is ready

    rdata = McbspaRegs.DRR1.all;                      // Then read DRR1 to complete receiving of data

    CS_H();

    return  rdata;

}

用逻辑分析发现，mcbsp模拟spi读出的数据始终是0，根本接收不到数据该怎么解决？有没有像spi一样，可以禁止发送功能的？

以下为mcbsp的配置程序

        McbspaRegs.SPCR2.all=0x0000;     // Reset FS generator, sample rate generator & transmitter

        McbspaRegs.SPCR1.all=0x0000;        // Reset Receiver, Right justify word, Digital loopback dis.

        McbspaRegs.PCR.all=0x0F08;           //(CLKXM=CLKRM=FSXM=FSRM= 1, FSXP = 1)

        McbspaRegs.SPCR1.bit.DLB = 0;        //为0则禁止回送,为1则使用回送功能

        McbspaRegs.SPCR1.bit.CLKSTP = 2;     // Together with CLKXP/CLKRP determines clocking scheme       时钟停止模式,有时钟延迟

        McbspaRegs.PCR.bit.CLKXP = 0;       // CPOL = 0, CPHA = 0 rising edge no delay上升沿发送

        McbspaRegs.PCR.bit.CLKRP = 0;        //下降沿接收

        McbspaRegs.RCR2.bit.RDATDLY=01;      // FSX setup time 1 in master mode. 0 for slave mode (Receive)

        McbspaRegs.XCR2.bit.XDATDLY=01;      // FSX setup time 1 in master mode. 0 for slave mode (Transmit)

        McbspaRegs.RCR1.bit.RWDLEN1=2;     // 32-bit word  RWDLEN1=101 32bit

        McbspaRegs.XCR1.bit.XWDLEN1=2;     // 32-bit word  RWDLEN1=010 16bit

        McbspaRegs.SRGR2.all=0x2000;          // CLKSM=1, FPER = 1 CLKG periods

     //   McbspaRegs.SRGR1.all= 0x000F;       // Frame Width = 1 CLKG period, CLKGDV=16

        McbspaRegs.SRGR1.bit.CLKGDV = 4; // CLKG frequency = LSPCLK/(CLKGDV+1)增加波特率，原先为1不好使

        McbspaRegs.SPCR2.bit.GRST=1;         // Enable the sample rate generator

        delay_loop();                        // Wait at least 2 SRG clock cycles

        McbspaRegs.SPCR2.bit.XRST=1;         // Release TX from Reset

        McbspaRegs.SPCR1.bit.RRST=1;         // Release RX from Reset

        McbspaRegs.SPCR2.bit.FRST=1;         // Frame Sync Generator reset

bit.RXFFST == 0 ) {};          //等待接收数据
    rdata = SpiaRegs.SPIRXBUF;
    return  rdata;
}