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/* --COPYRIGHT--,BSD_EX
* Copyright (c) 2014, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************
*
* MSP430 CODE EXAMPLE DISCLAIMER
*
* MSP430 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
* concise manner. For this the code may rely on the device's power-on default
* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
* for an API functional library-approach to peripheral configuration.
*
* --/COPYRIGHT--*/
//******************************************************************************
// MSP430FR413x Demo - Configure MCLK for 8MHz sourced from DCO.
//
// Description: Default DCODIV is MCLK and SMCLK source.
// By default, FR413x select XT1 as FLL reference.
// If XT1 is present, the XIN and XOUT pin needs to configure.
// If XT1 is absent, switch to select REFO as FLL reference automatically.
// XT1 is considered to be absent in this example.
// f(DCOCLK) = 2^FLLD * (FLLN+1) * (fFLLREFCLK / n).
// FLLD = 0, FLLN =243, n=1, DIVM =1, f(DCOCLK) = 2^0 * (243+1)*32768Hz = 8MHz,
// f(DCODIV) = (243+1)*32768Hz = 8MHz,
// ACLK = default REFO ~32768Hz, SMCLK = MCLK = f(DCODIV) = 8MHz.
// Toggle LED to indicate that the program is running.
//
// MSP430FR4133
// ---------------
// /|\| |
// | | |
// --|RST |
// | P1.0 |---> LED
// | P1.4 |---> MCLK = 8MHz
// | P8.0 |---> SMCLK = 8MHz
// | P8.1 |---> ACLK = 32768Hz
//
//
// William Goh
// Texas Instruments Inc.
// March 2014
// Built with IAR Embedded Workbench v6.10 & Code Composer Studio v6.0
//******************************************************************************
#include <msp430.h>
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_3; // Set DCO = 8MHz
CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
// default DCODIV as MCLK and SMCLK source
P1DIR |= BIT0 | BIT4; // set MCLK and LED pin as output
P1SEL0 |= BIT4; // set MCLK pin as second function
P8DIR |= BIT0 | BIT1; // set ACLK and SMCLK pin as output
P8SEL0 |= BIT0 | BIT1; // set ACLK and SMCLK pin as second function
PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
while(1)
{
P1OUT ^= BIT0; // Toggle P1.0 using exclusive-OR
__delay_cycles(10000000); // Delay for 10000000*(1/MCLK)=1.25s
}
}
