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MSP430FR2433的硬件IIC怎么设置为从机400K呢？我现在这边主机是IIC的400K速率，读取数据时2433反应不过来https://e2echina.ti.com/形如图
你好。附件里是代码吗？下载不了。
msp430里有作为iic从机的的例程，不过不是400k，楼主参考下吧
//****************************************************************************** // MSP430FR243x Demo - eUSCI_B0 I2C Slave TX multiple bytes to MSP430 Master // // Description: This demo connects two MSP430's via the I2C bus. The master // reads from the slave. This is the SLAVE code. The TX data begins at 0 // and is incremented each time it is sent. A stop condition // is used as a trigger to initialize the outgoing data. // The USCI_B0 TX interrupt is used to know // when to TX. // ACLK = default REFO ~32768Hz, MCLK = SMCLK = default DCODIV ~1MHz. // // *****used with "msp430fr243x_euscib0_i2c_10.c"**** // // /|\ /|\ // MSP430FR2433 10k 10k MSP430FR2433 // slave | | master // ----------------- | | ----------------- // | P1.2/UCB0SDA|<-|----|->|P1.2/UCB0SDA | // | | | | | // | | | | | // | P1.3/UCB0SCL|<-|------>|P1.3/UCB0SCL | // | | | | // // Cen Fang // Texas Instruments Inc. // June 2013 // Built with IAR Embedded Workbench v6.20 & Code Composer Studio v6.0.1 //****************************************************************************** #include <msp430.h> volatile unsigned char TXData; int main(void) { WDTCTL = WDTPW | WDTHOLD; // Configure GPIO P1SEL0 |= BIT2 | BIT3; // I2C pins // Disable the GPIO power-on default high-impedance mode to activate // previously configured port settings PM5CTL0 &= ~LOCKLPM5; // Configure USCI_B0 for I2C mode UCB0CTLW0 = UCSWRST; // Software reset enabled UCB0CTLW0 |= UCMODE_3 | UCSYNC; // I2C mode, sync mode UCB0I2COA0 = 0x48 | UCOAEN; // own address is 0x48 + enable UCB0CTLW0 &= ~UCSWRST; // clear reset register UCB0IE |= UCTXIE0 | UCSTPIE; // transmit,stop interrupt enable __bis_SR_register(LPM0_bits | GIE); // Enter LPM0 w/ interrupts __no_operation(); } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector = USCI_B0_VECTOR __interrupt void USCIB0_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCIB0_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG)) { case USCI_NONE: break; // Vector 0: No interrupts case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG case USCI_I2C_UCNACKIFG: break; // Vector 4: NACKIFG case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG case USCI_I2C_UCSTPIFG: // Vector 8: STPIFG TXData = 0; UCB0IFG &= ~UCSTPIFG; // Clear stop condition int flag break; case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3 case USCI_I2C_UCTXIFG3: break; // Vector 14: TXIFG3 case USCI_I2C_UCRXIFG2: break; // Vector 16: RXIFG2 case USCI_I2C_UCTXIFG2: break; // Vector 18: TXIFG2 case USCI_I2C_UCRXIFG1: break; // Vector 20: RXIFG1 case USCI_I2C_UCTXIFG1: break; // Vector 22: TXIFG1 case USCI_I2C_UCRXIFG0: break; // Vector 24: RXIFG0 case USCI_I2C_UCTXIFG0: UCB0TXBUF = TXData++; break; // Vector 26: TXIFG0 case USCI_I2C_UCBCNTIFG: break; // Vector 28: BCNTIFG case USCI_I2C_UCCLTOIFG: break; // Vector 30: clock low timeout case USCI_I2C_UCBIT9IFG: break; // Vector 32: 9th bit default: break; } }
