This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
大家好,
我是MSP430的初学者,遇到一些问题想麻烦大家指导我。
主要是想调试SPI串口的功能,测试情境如下:
我用lanchpad的MSP430G2553作为Master,用MSP-EXP430F5529作为Slave,
Master将资料从0x00每次递增加1、透过SPI传送给Slave,Slave接收再使用UART将资料传送PC,借此观察结果的正确性。
不过我用Access看回传值一直是错的(不是递增数值),调试很久找不出问题所在,所以上来跟各位高手讨教,请大家指导我一下。
以下是我的程序 :
//Master
#include <msp430.h>
/*
* main.c
*/
int main(void) {
unsigned int data=0x00;
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1OUT = 0x00; // P1 setup for reset output
P1DIR |= BIT5;
// Set DCO Clock
BCSCTL1 = CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
// SPI Initialize
P1SEL = BIT1 + BIT2 + BIT4;
P1SEL2 = BIT1 + BIT2 + BIT4;
UCA0CTL0 |= UCCKPL + UCMSB + UCMST + UCSYNC; // 3-pin, 8-bit SPI master
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 |= 0x02; // /2
UCA0BR1 = 0; //
UCA0MCTL = 0; // No modulation
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
// Reset SPI Slave
P1OUT &= ~BIT5; // Now with SPI signals initialized,
P1OUT |= BIT5; // reset slave
__delay_cycles(100);
// Wait for slave to initialize
// Data Transmit
for(;;)
{
while (!(IFG2 & UCA0TXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = data;
data++;
__delay_cycles(1000);
}
}
-----------------------------------------------------------------------------------------------------------------------------------------------------------
// Slave
#include <msp430.h>
/*
* main.c
*/
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
// CLK Set
UCSCTL3 |= SELREF_2; // Set DCO FLL Reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO
__bis_SR_register(SCG0); // Disable the FLL Control Loop
UCSCTL0 = 0x0000; // Will be Set Automatically by FLL
UCSCTL1 = DCORSEL_2; // 1 MHz range
UCSCTL2 = FLLD_1 + 32; // Set FLL to approximately 1 MHz:
// FLL divider result = 32768
// 32 * 32768 = "1 MHz"
// SPI Initialize
P3SEL = BIT0|BIT1|BIT2; // Set Pin Function for SPI Mode
UCB0CTL1 |= UCSWRST; // Put State Machine in Reset
UCB0CTL0 |= UCSYNC+UCMSB+UCCKPH; // 3-pin, 8-bit SPI Master,MSB First,Mode 0(UCCKPL=0,UCCKPH=1)
UCB0CTL1 &= ~UCSWRST; // SPI
UCB0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
// UART Initialize
P4SEL |= BIT4+BIT5; // P3.3,4 = USCI_A0 TXD/RXD
UCA1CTL1 |= UCSWRST; // **Put state machine in reset**
UCA1CTL1 |= UCSSEL_2; // SMCLK
UCA1BR0 = 6; // 1MHz 9600 (see User's Guide)
UCA1BR1 = 0; // 1MHz 9600
UCA1MCTL = UCBRS_0 + UCBRF_13+UCOS16; // Modln UCBRSx=0, UCBRFx=0,
UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
__bis_SR_register(LPM0_bits + GIE); // CPU off, enable interrupts
return 0;
}
#pragma vector=USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
{
while (!(UCA1IFG & UCTXIFG)); // USCI_A1 TX buffer ready?
UCA1TXBUF = UCB0RXBUF;
}
Ray Hsu,
建议调试程序时,逐步增加程序。你可以先调试程序,首先保证MSP430G2553 SPI发送数据正确,再次保证MSP-EXP430F5529 SPI接收数据正确。可以发送相同的数据,使用示波器观察,对于slave可以在线调试,直接查看接收值。都正确后,再在5529上添加UART程序。
事实上,TI均有对应例程,
首先附件为MSP430Ware中 G2553的SPI master发送程序;由于只能添加一个附件,下帖续。
/* --COPYRIGHT--,BSD_EX * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430G2xx3 Demo - USCI_A0, SPI 3-Wire Master Incremented Data // // Description: SPI master talks to SPI slave using 3-wire mode. Incrementing // data is sent by the master starting at 0x01. Received data is expected to // be same as the previous transmission. USCI RX ISR is used to handle // communication with the CPU, normally in LPM0. If high, P1.0 indicates // valid data reception. // ACLK = n/a, MCLK = SMCLK = DCO ~1.2MHz, BRCLK = SMCLK/2 // // Use with SPI Slave Data Echo code example. If slave is in debug mode, P3.6 // slave reset signal conflicts with slave's JTAG; to work around, use IAR's // "Release JTAG on Go" on slave device. If breakpoints are set in // slave RX ISR, master must stopped also to avoid overrunning slave // RXBUF. // // MSP430G2xx3 // ----------------- // /|\| XIN|- // | | | // --|RST XOUT|- // | | // | P1.2|-> Data Out (UCA0SIMO) // | | // LED <-|P1.0 P1.1|<- Data In (UCA0SOMI) // | | // Slave reset <-|P1.5 P1.4|-> Serial Clock Out (UCA0CLK) // // // D. Dang // Texas Instruments Inc. // February 2011 // Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10 //****************************************************************************** #include <msp430.h> unsigned char MST_Data, SLV_Data; int main(void) { volatile unsigned int i; WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer P1OUT = 0x00; // P1 setup for LED & reset output P1DIR |= BIT0 + BIT5; // P1SEL = BIT1 + BIT2 + BIT4; P1SEL2 = BIT1 + BIT2 + BIT4; UCA0CTL0 |= UCCKPL + UCMSB + UCMST + UCSYNC; // 3-pin, 8-bit SPI master UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 |= 0x02; // /2 UCA0BR1 = 0; // UCA0MCTL = 0; // No modulation UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** IE2 |= UCA0RXIE; // Enable USCI0 RX interrupt P1OUT &= ~BIT5; // Now with SPI signals initialized, P1OUT |= BIT5; // reset slave __delay_cycles(75); // Wait for slave to initialize MST_Data = 0x01; // Initialize data values SLV_Data = 0x00; UCA0TXBUF = MST_Data; // Transmit first character __bis_SR_register(LPM0_bits + GIE); // CPU off, enable interrupts } // Test for valid RX and TX character #pragma vector=USCIAB0RX_VECTOR __interrupt void USCIA0RX_ISR(void) { volatile unsigned int i; while (!(IFG2 & UCA0TXIFG)); // USCI_A0 TX buffer ready? if (UCA0RXBUF == SLV_Data) // Test for correct character RX'd P1OUT |= BIT0; // If correct, light LED else P1OUT &= ~BIT0; // If incorrect, clear LED MST_Data++; // Increment master value SLV_Data++; // Increment expected slave value UCA0TXBUF = MST_Data; // Send next value __delay_cycles(50); // Add time between transmissions to } // make sure slave can keep up
此贴附件为F5529 SPI slave例程。它将接收到的数据,又依次发送出去了。
用这个例程和前面G2553的例程合作,即可看到G2553上面的LED亮了。说明G2553依次发数给5529,后又收到了5529返回的数。数据均正确,LED就会亮。
/* --COPYRIGHT--,BSD_EX * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430F552x Demo - USCI_A0, SPI 3-Wire Slave Data Echo // // Description: SPI slave talks to SPI master using 3-wire mode. Data received // from master is echoed back. USCI RX ISR is used to handle communication, // CPU normally in LPM4. Prior to initial data exchange, master pulses // slaves RST for complete reset. // ACLK = ~32.768kHz, MCLK = SMCLK = DCO ~ 1048kHz // // Use with SPI Master Incremented Data code example. If the slave is in // debug mode, the reset signal from the master will conflict with slave's // JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If // breakpoints are set in slave RX ISR, master must stopped also to avoid // overrunning slave RXBUF. // // MSP430F552x // ----------------- // /|\ | | // | | | // Master---+->|RST | // | | // | P3.3|-> Data Out (UCA0SIMO) // | | // | P3.4|<- Data In (UCA0SOMI) // | | // | P2.7|-> Serial Clock Out (UCA0CLK) // // // Bhargavi Nisarga // Texas Instruments Inc. // April 2009 // Built with CCSv4 and IAR Embedded Workbench Version: 4.21 //****************************************************************************** #include <msp430.h> int main(void) { WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer while(!(P2IN&0x80)); // If clock sig from mstr stays low, // it is not yet in SPI mode P3SEL |= BIT3+BIT4; // P3.3,4 option select P2SEL |= BIT7; // P2.7 option select UCA0CTL1 |= UCSWRST; // **Put state machine in reset** UCA0CTL0 |= UCSYNC+UCCKPL+UCMSB; // 3-pin, 8-bit SPI slave, // Clock polarity high, MSB UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM4_bits + GIE); // Enter LPM4, enable interrupts } // Echo character #pragma vector=USCI_A0_VECTOR __interrupt void USCI_A0_ISR(void) { switch(__even_in_range(UCA0IV,4)) { case 0:break; // Vector 0 - no interrupt case 2: // Vector 2 - RXIFG while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready? UCA0TXBUF = UCA0RXBUF; break; case 4:break; // Vector 4 - TXIFG default: break; } }
SPI发送和接收均正确后,再调试UART发送的程序,就较为简单了。使用调试助手看看F5529发送出去的数据对不对,正确的话,把SPI slave和UART程序合起来就行了。当然这些例程你需要理解,并按照自己的想法改变,组合一下。O(∩_∩)O~
附件为UART例程,可以参考一下。
/* --COPYRIGHT--,BSD_EX * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430F552x Demo - USCI_A0, 115200 UART Echo ISR, DCO SMCLK // // Description: Echo a received character, RX ISR used. Normal mode is LPM0. // USCI_A0 RX interrupt triggers TX Echo. // Baud rate divider with 1048576hz = 1048576/115200 = ~9.1 (009h|01h) // ACLK = REFO = ~32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz // See User Guide for baud rate divider table // // MSP430F552x // ----------------- // /|\| | // | | | // --|RST | // | | // | P3.3/UCA0TXD|------------> // | | 115200 - 8N1 // | P3.4/UCA0RXD|<------------ // // Bhargavi Nisarga // Texas Instruments Inc. // April 2009 // Built with CCSv4 and IAR Embedded Workbench Version: 4.21 //****************************************************************************** #include <msp430.h> int main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT P3SEL |= BIT3+BIT4; // P3.3,4 = USCI_A0 TXD/RXD UCA0CTL1 |= UCSWRST; // **Put state machine in reset** UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 = 9; // 1MHz 115200 (see User's Guide) UCA0BR1 = 0; // 1MHz 115200 UCA0MCTL |= UCBRS_1 + UCBRF_0; // Modulation UCBRSx=1, UCBRFx=0 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM0_bits + GIE); // Enter LPM0, interrupts enabled __no_operation(); // For debugger } // Echo back RXed character, confirm TX buffer is ready first #pragma vector=USCI_A0_VECTOR __interrupt void USCI_A0_ISR(void) { switch(__even_in_range(UCA0IV,4)) { case 0:break; // Vector 0 - no interrupt case 2: // Vector 2 - RXIFG while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready? UCA0TXBUF = UCA0RXBUF; // TX -> RXed character break; case 4:break; // Vector 4 - TXIFG default: break; } }
Ray Hsu,
你先用示波器看看发送出来的数是什么,发送的波特率是多少?先保证发送正确了。
记得将MSP430 uart程序中调为115200时,user guide中有个表,是相关UART波特率配置参数表,按照那个来。串口调试助手中UART也设置为115200.
希望对你有帮助!O(∩_∩)O~
谢谢Lina Lian的回覆,
我有试了你的方法。
容我先解释一下我的实验 :
我透过g2553 SPI传送递增的data(0x00,0x01,0x02,0x03…)给f5529,f5529再将SPI所收到的值经由UART传回电脑。
在baud rate是9600的情况下,电脑确实的收到正确递增数值,但透过示波器看g2553的SPI DOUT接脚,却仅是一连串的方波,如下图。
在baud rate是115200的情况下,电脑不断收到0xFF,g2553的SPI DOUT输出仍如上图。
我的f5529 UART配置如下 :
P4SEL |= BIT4+BIT5; // P3.3,4 = USCI_A0 TXD/RXD
UCA1CTL1 |= UCSWRST; // **Put state machine in reset**
UCA1CTL1 |= UCSSEL_2; // SMCLK
UCA1BR0 = 8; // 1MHz 115200 (see User's Guide)
UCA1BR1 = 0; // 1MHz 115200
UCA1MCTL |= UCBRS_6 + UCBRF_0; // Modulation UCBRSx=1, UCBRFx=0
UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
找不出原因,再麻烦您指教了!
Ray Hsu,
对于MSP430F5529而言,你的SMCLK是多大啊?是1MHz,还是默认的1.048576MHz?
参考user guide中的Table 34-4. Commonly Used Baud Rates, Settings, and Errors, UCOS16 = 0设置正确。看你的设置应该是1MHz.
谢谢Lina Lian的回答
我的SMLCK是1MHZ,有照着用户指南上设。
后来发现可能是这段代码有问题,因为其他部份都是代码示例里面的东西:
// Data Transmit
for(;;)
{
while (!(IFG2 & UCA0TXIFG)); // USCI_A0 TX buffer ready?d
UCA0TXBUF = data;
data=data+1;
__delay_cycles(100000);
}
示波器显示就是如之前的PO文那样,
DOUT是规则方波,SCLK维持是高电平,
不晓得这段代码出了什么问题?
你好,我想请问一下msp430g2553 spi发送数据时就这么写“UCA0TXBUF = MST_Data;”吗?
那接收数据怎么写成查询方式呢?
谢谢!