使用msp430f5系列开启25M的高速内部时钟时出现的问题

kaixiang chen

Other Parts Discussed in Thread: MSP430F5529

能否帮我看下这个官方例程？

这个例程可以开启25M的主时钟，但是我确实很多地方都看不懂啊，谁能帮我解释一下呢？主要是

void SetVcoreUp (unsigned int level)这个函数不懂，学1系列的时候，这里面的东西压根没见过，他们有什么作用？为什么要对他们进行设置？我试了其他可以开启25M的程序，结果发现，程序运行时他们都跑飞了，就这个程序可以开启。是不是

void SetVcoreUp (unsigned int level)可以防止跑飞啊？谢谢啊~

程序如下：

#include <msp430f5529.h>

void SetVcoreUp (unsigned int level)

{

// Open PMM registers for write

PMMCTL0_H = PMMPW_H;

// Set SVS/SVM high side new level

SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;

// Set SVM low side to new level

SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;

// Wait till SVM is settled

while ((PMMIFG & SVSMLDLYIFG) == 0);

// Clear already set flags

PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);

// Set VCore to new level

PMMCTL0_L = PMMCOREV0 * level;

// Wait till new level reached

if ((PMMIFG & SVMLIFG))

while ((PMMIFG & SVMLVLRIFG) == 0);

// Set SVS/SVM low side to new level

SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;

// Lock PMM registers for write access

PMMCTL0_H = 0x00;

}

void TIME(void)

{

SetVcoreUp (0x01);

SetVcoreUp (0x02);

SetVcoreUp (0x03);

UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO

UCSCTL4 |= SELA_2; // Set ACLK = REFO

__bis_SR_register(SCG0); // Disable the FLL control loop

UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx

UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation

UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz

// (N + 1) * FLLRef = Fdco// (762 + 1) * 32768 = 25MHz // Set FLL Div = fDCOCLK/2

__bic_SR_register(SCG0); // Enable the FLL control loop

// Worst-case settling time for the DCO when the DCO range bits have been

// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx

// UG for optimization.

// 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle

__delay_cycles(782000);

// Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize

{

UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);

// Clear XT2,XT1,DCO fault flags

SFRIFG1 &= ~OFIFG; // Clear fault flags

}while (SFRIFG1&OFIFG); // Test oscillator fault flag

__no_operation(); //设断点观察时钟输出引脚上的波形和频率

// P3OUT|=BIT0;

}

能否帮我看下这个官方例程？

这个例程可以开启25M的主时钟，但是我确实很多地方都看不懂啊，谁能帮我解释一下呢？主要是

void SetVcoreUp (unsigned int level)可以防止跑飞啊？谢谢啊~

程序如下：

#include <msp430f5529.h>

void SetVcoreUp (unsigned int level)

{

// Open PMM registers for write

PMMCTL0_H = PMMPW_H;

// Set SVS/SVM high side new level

SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;

// Set SVM low side to new level

SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;

// Wait till SVM is settled

while ((PMMIFG & SVSMLDLYIFG) == 0);

// Clear already set flags

PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);

// Set VCore to new level

PMMCTL0_L = PMMCOREV0 * level;

// Wait till new level reached

if ((PMMIFG & SVMLIFG))

while ((PMMIFG & SVMLVLRIFG) == 0);

// Set SVS/SVM low side to new level

SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;

// Lock PMM registers for write access

PMMCTL0_H = 0x00;

}

void TIME(void)

{

SetVcoreUp (0x01);

SetVcoreUp (0x02);

SetVcoreUp (0x03);

UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO

UCSCTL4 |= SELA_2; // Set ACLK = REFO

__bis_SR_register(SCG0); // Disable the FLL control loop

UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx

UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation

UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz

// (N + 1) * FLLRef = Fdco// (762 + 1) * 32768 = 25MHz // Set FLL Div = fDCOCLK/2

__bic_SR_register(SCG0); // Enable the FLL control loop

// Worst-case settling time for the DCO when the DCO range bits have been

// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx

// UG for optimization.

// 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle

__delay_cycles(782000);

// Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize

{

UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);

// Clear XT2,XT1,DCO fault flags

SFRIFG1 &= ~OFIFG; // Clear fault flags

}while (SFRIFG1&OFIFG); // Test oscillator fault flag

__no_operation(); //设断点观察时钟输出引脚上的波形和频率

// P3OUT|=BIT0;

}

能否帮我看下这个官方例程？

这个例程可以开启25M的主时钟，但是我确实很多地方都看不懂啊，谁能帮我解释一下呢？主要是

void SetVcoreUp (unsigned int level)可以防止跑飞啊？谢谢啊~

程序如下：

#include <msp430f5529.h>

void SetVcoreUp (unsigned int level)

{

// Open PMM registers for write

PMMCTL0_H = PMMPW_H;

// Set SVS/SVM high side new level

SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;

// Set SVM low side to new level

SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;

// Wait till SVM is settled

while ((PMMIFG & SVSMLDLYIFG) == 0);

// Clear already set flags

PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);

// Set VCore to new level

PMMCTL0_L = PMMCOREV0 * level;

// Wait till new level reached

if ((PMMIFG & SVMLIFG))

while ((PMMIFG & SVMLVLRIFG) == 0);

// Set SVS/SVM low side to new level

SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;

// Lock PMM registers for write access

PMMCTL0_H = 0x00;

}

void TIME(void)

{

SetVcoreUp (0x01);

SetVcoreUp (0x02);

SetVcoreUp (0x03);

UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO

UCSCTL4 |= SELA_2; // Set ACLK = REFO

__bis_SR_register(SCG0); // Disable the FLL control loop

UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx

UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation

UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz

// (N + 1) * FLLRef = Fdco// (762 + 1) * 32768 = 25MHz // Set FLL Div = fDCOCLK/2

__bic_SR_register(SCG0); // Enable the FLL control loop

// Worst-case settling time for the DCO when the DCO range bits have been

// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx

// UG for optimization.

// 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle

__delay_cycles(782000);

// Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize

{

UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);

// Clear XT2,XT1,DCO fault flags

SFRIFG1 &= ~OFIFG; // Clear fault flags

}while (SFRIFG1&OFIFG); // Test oscillator fault flag

__no_operation(); //设断点观察时钟输出引脚上的波形和频率

// P3OUT|=BIT0;

}

14 年多前

0 Bruce Wei 13 年多前

TI__Mastermind 24987 points

你好！

这是MSP430的driverlib的库函数，在MSP430ware里面可以找到MSP430® Peripheral Driver Library User's Guide

0 Young Hu 13 年多前

TI__Mastermind 29385 points

我建议您先看一下F5xx/6xx的User's Guide，很难在这里快速给您描述清楚您的问题。

1xx和5xx虽然内核是一样的，但是有很多的区别，希望您能了解一下User's Guide。

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使用msp430f5系列开启25M的高速内部时钟时出现的问题