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MSP430F5419A晶振外接12M晶振,使用XT2无法起振



1、测量Vcore电压为1.9V,没有升压成功;
2、SMCLK晶振一直显示12M频率,而且无法通过配置改变。
int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer
  SetVcoreUp(PMMCOREV_1); 
  SetVcoreUp(PMMCOREV_2);                     // Set VCore to 24MHz for 32MHz
  SetVcoreUp(PMMCOREV_3);  
       
  P11DIR = BIT1+BIT2+BIT0;                       // P11.1-2 to output direction
  P11SEL |= BIT0+BIT1+BIT2;                      // P11.1-2 to output SMCLK,MCLK
  
  P5SEL |= 0x0C;                            // Port select XT2

  UCSCTL6 &= ~XT2OFF;              // Enable XT1,XT2
  UCSCTL3 |= SELREF_2;  
 
                                            // Since LFXT1 is not used,
                                            // sourcing FLL with LFXT1 can cause
                                            // XT1OFFG flag to set
  UCSCTL4 |= SELA_2;                      // ACLK=REFO,32.768khz
  
      __bis_SR_register(SCG0);                  // 关闭 FLL 
    UCSCTL0 = 31;                              // Set lowest possible DCOx, MODx
    UCSCTL1 = DCORSEL_7;                      // Select DCO range 25MHz operation
    UCSCTL6 |= XT2DRIVE_3;
    UCSCTL3 |= (FLLREFDIV_4+SELREF_5);          //分频至1MHZ,使用XT2

    UCSCTL2 = FLLD_2 + 24;                     //Fdco=(N + 1) * FLLrefdiv  Set FLL Div = fDCOCLK/4
 
    __bic_SR_register(SCG0);                  // 打开 FLL 
    __delay_cycles(782000);
    
    UCSCTL4 |= SELS_2 + SELM_3; 
    
  // Loop until XT1,XT2 & DCO stabilizes
  do
  {
    UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
                                            // Clear XT2,XT1,DCO fault flags
    SFRIFG1 &= ~OFIFG;                      // Clear fault flags
  }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag
                                            // expected frequency
  while(1);                                 // Loop in place
}

 
  • 楼主你好!

    可以试试附件的代码。

  • 使用官方的代码能通过,只要倍频就会出问题。

  • /*
    *********************************************************************************************************
    * Drv_SetVcoreUp()
    *
    * Description : (1) TBD
    *
    * Argument(s) : none.
    *
    * Return(s) : none.
    *
    * Caller(s) : Application.
    *
    * Note(s) : (1) TBD
    *********************************************************************************************************
    */

    void Drv_SetVcoreUp (UINT16_T level)
    {
    PMMCTL0_H = PMMPW_H; /* Open PMM registers for write */
    SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; /* Set SVS/SVM high side new level */
    SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; /* Set SVM low side to new level */

    while ((PMMIFG & SVSMLDLYIFG) == 0); /* Wait till SVM is settled */

    PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); /* Clear already set flags */
    PMMCTL0_L = PMMCOREV0 * level; /* Set VCore to new level */

    if ((PMMIFG & SVMLIFG)) /* Wait till new level reached */
    while ((PMMIFG & SVMLVLRIFG) == 0);

    SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; /* Set SVS/SVM low side to new level */
    PMMCTL0_H = 0x00; /* Lock PMM registers for write access */
    }


    /*
    *********************************************************************************************************
    * Drv_UcsInit()
    *
    * Description : (1) TBD
    *
    * Argument(s) : none.
    *
    * Return(s) : none.
    *
    * Caller(s) : Application.
    *
    * Note(s) : (1) TBD
    *********************************************************************************************************
    */

    void Drv_UcsInit (void)
    {
    // Increase Vcore setting to level3 to support fsystem=25MHz
    // NOTE: Change core voltage one level at a time..
    Drv_SetVcoreUp (0x01);
    Drv_SetVcoreUp (0x02);
    Drv_SetVcoreUp (0x03);

    UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO
    UCSCTL4 |= SELA_2; // Set ACLK = REFO

    __bis_SR_register(SCG0); // Disable the FLL control loop
    UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
    UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation
    UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz
    // (N + 1) * FLLRef = Fdco
    // (762 + 1) * 32768 = 25MHz
    // Set FLL Div = fDCOCLK/2
    __bic_SR_register(SCG0); // Enable the FLL control loop

    // Worst-case settling time for the DCO when the DCO range bits have been
    // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
    // UG for optimization.
    // 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle
    __delay_cycles(782000);

    // Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize
    do
    {
    UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
    // Clear XT2,XT1,DCO fault flags
    SFRIFG1 &= ~OFIFG; // Clear fault flags
    }while (SFRIFG1&OFIFG); // Test oscillator fault flag
    }

  • Fish Fly,

    我看了你的程序,你既然已经调用了 SetVcoreUp()函数,说明你直接调用了MSP430F5xx/6xx的core library,这是非常推荐的做法。但是,你对函数的调用和理解是有问题的,另外,既然你调用了core library,直接启动XT2,以及倍频,都是可以直接调用函数的,不需要自己写这么麻烦的。

    具体建议如下:

    1. SetVcoreUp(x)的含义是:将core level提高x, 如果为1,默认为core_level_0, 调用后,变为core_level_1. 而你直接调用了3遍,且总共提高1+2+3=6个level, 这肯定是不合适的。 我猜想你想要调用的函数应该是:SetVCore(). 你只需要调用一次 SetVCore(PMMCOREV_3)即可。你自己提示core level时,需要一级一级升,但是调用core llibrary,则直接设置为想要设计的core level即可。函数中会一级一级升的。

    2. 启用XT2,需要调用void XT2_Start(uint16_t int xtdrive)即可;

    3. 后设计倍频需要调用

    SELECT_FLLREF(source);

    void Init_FLL_Settle(uint16_t int fsystem, uint16_t ratio);

    建议你看看“MSP430F5xx and MSP430F6xx Core Libraries”:http://www.ti.com/lit/an/slaa448c/slaa448c.pdf 

    BR,

    Lina