MSP432P4001R SPI

您现在是想实现3线SPI通信？

那您可以参考下 C:\ti\simplelink_msp432p4_sdk_3_10_00_08\examples\nortos\MSP_EXP432P401R\registerLevel 内的

msp432p401x_euscib0_spi_09 （master）和 msp432p401x_euscib0_spi_10（slave）

能描述下您现在使用的硬件吗？

3線通信沒錯!
硬件的部分目前是利用兩塊MSP432進行溝通，完成後，未來會改成MSP432P401R(主) ADS1299EEGFE-PDK(從)
那個範例我也有參考過，但是有些地方我不知道該如何撰寫，以下code是我利用msp432p401x_euscib0_spi_09（主）撰寫修改的，但我不知道如果我要用這個範例發送多個指令，該如何撰寫，我對於中斷函式不太了解該如何運用，




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*******************************************************************************
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* MSP432 CODE EXAMPLE DISCLAIMER
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* MSP432 code examples are self-contained low-level programs that typically
* demonstrate a single peripheral function or device feature in a highly
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* register values and settings such as the clock configuration and care must
* be taken when combining code from several examples to avoid potential side
* effects. Also see www.ti.com/.../mspdriverlib for an API functional
* library & https://dev.ti.com/pinmux/ for a GUI approach to peripheral configuration.
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//******************************************************************************
// MSP432P401 Demo - eUSCI_B0, SPI 3-Wire Master with clock polarity high
//
// This example can be used with msp432p401x_euscib0_spi_10.c 3-wire Slave.
//
// Description: SPI master talks to SPI slave using 3-wire mode. This example
// increments data sent by the master starting at 0x01. Received data is
// expected to be same as the previous transmission RXData = TXData - 1 if
// this example is used with msp432p401x_euscib0_spi_10.c.
//
// USCI RX ISR is used to handle communication with the CPU, normally in LPM0.
//
// MSP432P401x Master MSP432P401x Slaves
// ----------------- -----------------
// /|\| | /|\| |
// | | | | | |
// --|RST | --|RST |
// | | | |
// | | Data In (UCB0SIMO) | |
// | P1.6|------------------->|P1.6 |
// | | | |
// | | Data OUT (UCB0SOMI)| |
// | P1.7|<-------------------|P1.7 |
// | | | |
// | | S Clock (UCB0CLK) | |
// | P1.5|------------------->|P1.5 |
// | | | |
//
// William Goh
// Texas Instruments Inc.
// June 2016 (updated) | June 2014 (created)
// Built with CCSv6.1, IAR, Keil, GCC
//******************************************************************************
#include "ti/devices/msp432p4xx/inc/msp.h"
#include <stdint.h>

static uint8_t RXData = 0;
static uint8_t TXData;

int main(void)
{
volatile uint32_t i;
uint8_t previousData;

WDT_A->CTL = WDT_A_CTL_PW | // Stop watchdog timer
WDT_A_CTL_HOLD;

P1->OUT &= ~BIT0;
P1->DIR |= BIT0; // Set P1.0 LED

P1->SEL0 |= BIT5 | BIT6 | BIT7; // Set P1.5, P1.6, and P1.7 as
// SPI pins functionality

EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put eUSCI state machine in reset
EUSCI_B0->CTLW0 = EUSCI_B_CTLW0_SWRST | // Remain eUSCI state machine in reset
EUSCI_B_CTLW0_MST | // Set as SPI master
EUSCI_B_CTLW0_SYNC | // Set as synchronous mode
EUSCI_B_CTLW0_CKPL | // Set clock polarity high
EUSCI_B_CTLW0_MSB; // MSB first

EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SSEL__ACLK; // ACLK
EUSCI_B0->BRW = 0x01; // /2,fBitClock = fBRCLK/(UCBRx+1).
EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// Initialize USCI state machine

TXData = 0x01; // Initialize TX data to 0x01

// Enable global interrupt
__enable_irq();

// Enable eUSCI_B0 interrupt in NVIC module
NVIC->ISER[0] = 1 << ((EUSCIB0_IRQn) & 31);

// Wake up on exit from ISR
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;

// Ensures SLEEPONEXIT takes effect immediately
__DSB();

while(1)
{

EUSCI_B0->IFG |= EUSCI_B_IFG_TXIFG;// Clear TXIFG flag
EUSCI_B0->IE |= EUSCI_B_IE_TXIE; // Enable TX interrupt
EUSCI_B0->IFG |= EUSCI_B_IFG_RXIFG;// Clear TXIFG flag
EUSCI_B0->IE |= EUSCI_B_IE_RXIE; // Enable TX interrupt

__sleep();
__no_operation(); // For debug,Remain in LPM0

// Check the received data
/*previousData = TXData - 1;
if (RXData != (previousData))
{
// If the Received data is not equal to TXData-1, then
// Set P1.0 LED
P1->OUT |= BIT0;
}
else
{
P1->OUT &= ~BIT0;
}*/

for (i = 2000; i > 0; i--); // Delay before next transmission
//TXData++; // Increment transmit data
}
}

// SPI interrupt service routine
void EUSCIB0_IRQHandler(void)
{
if (EUSCI_B0->IFG & EUSCI_B_IFG_TXIFG)
{

EUSCI_B0->TXBUF = TXData; // Transmit characters
EUSCI_B0->IE &= ~EUSCI_B__TXIE;

// Wait till a character is received
//while (!(EUSCI_B0->IFG & EUSCI_B_IFG_RXIFG));
//RXData = EUSCI_B0->RXBUF;

// Clear the receive interrupt flag
//EUSCI_B0->IFG &= ~EUSCI_B_IFG_RXIFG;
}
if (EUSCI_B0->IFG & EUSCI_B_IFG_RXIFG)
{
//EUSCI_B0->IE &= ~EUSCI_B__RXIE;
// USCI_B0 TX buffer ready?
//while (!(EUSCI_B0->IFG & EUSCI_B_IFG_TXIFG));
RXData = EUSCI_B0->RXBUF;
EUSCI_B0->IE &= ~EUSCI_B__RXIE;
// Echo received data
//EUSCI_B0->TXBUF = EUSCI_B0->RXBUF;
}
}

请您参考下下面的这种方式

7230.MSP430F55xx_usci_i2c_standard_master.c

先完成独立的发送和接收调试，然后再实现联合调试。先确认基本的配置没有问题，硬件没有问题。