This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
请问您是如何配置的?
在 https://dev.ti.com/tirex/explore/node?node=AIt11.GE8nvJkpoVjCiItQ__z-lQYNj__LATEST 内
/* --COPYRIGHT--,BSD_EX * Copyright (c) 2013, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP432 CODE EXAMPLE DISCLAIMER * * MSP432 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see http://www.ti.com/tool/mspdriverlib for an API functional * library & https://dev.ti.com/pinmux/ for a GUI approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP432P401 Demo - Device configuration for operation @ MCLK = DCO = 48MHz // // Description: Proper device configuration to enable operation at MCLK=48MHz // including: // 1. Configure VCORE level to 1 // 2. Configure flash wait-state to 1 // 3. Configure DCO frequency to 48MHz // 4. Ensure MCLK is sourced by DCO // // After configuration is complete, MCLK is output to port pin P4.3. // // MSP432P401x // ----------------- // /|\| | // | | | // --|RST | // | P4.3|----> MCLK // | | // // William Goh // Texas Instruments Inc. // June 2016 (updated) | November 2013 (created) // Built with CCSv6.1, IAR, Keil, GCC //****************************************************************************** #include "ti/devices/msp432p4xx/inc/msp.h" #include "stdint.h" void error(void); int main(void) { volatile uint32_t i; uint32_t currentPowerState; WDT_A->CTL = WDT_A_CTL_PW | WDT_A_CTL_HOLD; // Stop WDT P1->DIR |= BIT0; // P1.0 set as output /* NOTE: This example assumes the default power state is AM0_LDO. * Refer to msp432p401x_pcm_0x code examples for more complete PCM * operations to exercise various power state transitions between active * modes. */ /* Step 1: Transition to VCORE Level 1: AM0_LDO --> AM1_LDO */ /* Get current power state, if it's not AM0_LDO, error out */ currentPowerState = PCM->CTL0 & PCM_CTL0_CPM_MASK; if (currentPowerState != PCM_CTL0_CPM_0) error(); while ((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_1; while ((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); if (PCM->IFG & PCM_IFG_AM_INVALID_TR_IFG) error(); // Error if transition was not successful if ((PCM->CTL0 & PCM_CTL0_CPM_MASK) != PCM_CTL0_CPM_1) error(); // Error if device is not in AM1_LDO mode /* Step 2: Configure Flash wait-state to 1 for both banks 0 & 1 */ FLCTL->BANK0_RDCTL = (FLCTL->BANK0_RDCTL & ~(FLCTL_BANK0_RDCTL_WAIT_MASK)) | FLCTL_BANK0_RDCTL_WAIT_1; FLCTL->BANK1_RDCTL = (FLCTL->BANK0_RDCTL & ~(FLCTL_BANK1_RDCTL_WAIT_MASK)) | FLCTL_BANK1_RDCTL_WAIT_1; /* Step 3: Configure DCO to 48MHz, ensure MCLK uses DCO as source*/ CS->KEY = CS_KEY_VAL ; // Unlock CS module for register access CS->CTL0 = 0; // Reset tuning parameters CS->CTL0 = CS_CTL0_DCORSEL_5; // Set DCO to 48MHz /* Select MCLK = DCO, no divider */ CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM_3; CS->KEY = 0; // Lock CS module from unintended accesses /* Step 4: Output MCLK to port pin to demonstrate 48MHz operation */ P4->DIR |= BIT3; P4->SEL0 |=BIT3; // Output MCLK P4->SEL1 &= ~(BIT3); while (1) // continuous loop { P1->OUT ^= BIT0; // Blink P1.0 LED for (i = 200000; i > 0; i--); // Delay } } void error(void) { volatile uint32_t i; while (1) { P1->OUT ^= BIT0; for(i = 20000; i > 0; i--); // Blink LED forever } }
// Description: Proper device configuration to enable operation at MCLK=48MHz
// including:
// 1. Configure VCORE level to 1
// 2. Configure flash wait-state to 1
// 3. Configure DCO frequency to 48MHz
// 4. Ensure MCLK is sourced by DCO
另外 在更改 DCO 后,您可以将 MCLK 输出到引脚或使用 CS_getMCLK() 函数来评估 MCLK 频率。逻辑分析仪或示波器也可用于评估 SPI 通信速度。