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I use TPS63810 application to 3.1~3.5V input, stable 3.3V output, the schematic diagram is as follows:
L27: DFE201612E-R47M (Murata)
The total decoupling capacitor capacity of the regulated output 3V3R network is about 180uF (CAP, 0603-22uF/6.3V, X6S *8pcs), and the effective capacitance at 3.3V is about 70uF considering the DC bias effect of ceramic capacitors.
The test found that there was a large inrush current during the initial power-up, causing the product test to exceed the standard, as shown in the figure below, which was tested when the open load , CH1_3V3P: input voltage, CH2_ICC: input current, CH3_3V3R: output voltage.
Please help analyze what causes it, is there any way to improve it, thanks !
Hi
不太明白你的意思,输出电容建议太大,2个22uF即可。
这个芯片软起动做在芯片内部,你可以测试2个22uF和8个22uF同样负载下的inrush,比较看看。