UCC21530: Under what circumstances will both outputs of this chip be high

With deadtime interlock function enabled, instances where both outputs could be high would be induced by external factors.

A common cause for this is dV/dt induced turn-on due to Miller current.

This can happen especially on the low-side MOSFET in a half-bridge configuration, where high dV/dt on the switch node (drain of the low-side MOSFET) can induce a Miller current in the Miller capacitance of the MOSFET (Cgd). This current can bias the gate of the low-side MOSFET and turn it on momentarily.

To avoid this from occurring in a system, we recommend placing a gate-to-source pull down resistor of 10kohms.

Hope this helps.