Could you explain the root cause?
https://e2echina.ti.com/support/processors/f/processors-forum/1051320/tda4ven-q1-j722s-c7x-may-get-stuck-writing-mrr-registers-during-ipc-initialization
1.If I mask the mbox_fifo_write function in the omap_mbox_chan_send function, it will not be repeated (300 self-tests).
2.I speculate that it is related to the IPC message sent by the Soc core (A72/A53) to the C7X
3.When reading the MAILBOX_MAILBOX_CLUSTER_X register, I found that there was always a message in the mailbox. The interrupt trigger of the mailbox is level trigger, so it is speculated that the mailbox interrupt will continuously trigger the c7x interrupt, so I used it in several places when c7x initializes the clec register
volatile int i= 0;
while(i<=3000000){i++;}
The c7x is busy waiting for interrupts from the soc and and finds that they are not stuck.
