tms320c6747 release 版本 uart 工作不正常

jun yu3

Prodigy 20 points

debug版本可以。用硬件仿真模式也可以。就是release版本不可以。

中断函数的所有变量都定义成volatible类型了。

后面试了一下，在main函数中循环发送一个字符， release版本也不成功

有人能给一些建议吗？

cmd文件如下：

-c
-heap 0x3000
-stack 0x3000

MEMORY
{
   L1D:     o = 00F00000h   l = 00008000h
   L1P:     o = 00E00000h   l = 00008000h
   L2:      o = 00800000h   l = 00040000h
  }

SECTIONS
{

    .text       >       L2
    .stack      >       L2
    .bss        >       L2
    .cinit      >       L2
    .cio        >       L2
    .const      >       L2
    .sysmem     >       L2
    .far        >       L2
    .switch     >       L2
.data       >       L2
.vecs      >       L2
}

中断向量文件如下

.global _intcVectorTable
   .global _c_int00
   .global _vector1
   .global _vector2
   .global _vector3
   .global _UART2_isr
   .global _vector5
   .global _vector6
   .global _vector7
   .global _vector8
   .global _vector9
   .global _vector10
   .global _vector11

; This is a macro that instantiates one entry in the interrupt service table.
VEC_ENTRY .macro addr
    STW   B0,*--B15
    MVKL addr,B0
    MVKH addr,B0
    B     B0
    LDW   *B15++,B0
    NOP   2
    NOP
    NOP
   .endm

; This is a dummy interrupt service routine used to initialize the IST.
_vec_dummy:
B B3
NOP 5

; This is the actual interrupt service table (IST).
.sect ".vecs"
.align 1024

_intcVectorTable:
_vector0:   VEC_ENTRY _c_int00    ;RESET
_vector1:   VEC_ENTRY _vec_dummy ;NMI
_vector2:   VEC_ENTRY _vec_dummy ;RSVD
_vector3:   VEC_ENTRY _vec_dummy ;RSVD
_vector4:   VEC_ENTRY _UART2_isr ;isr0
_vector5:   VEC_ENTRY _vec_dummy ;isr0
_vector6:   VEC_ENTRY _vec_dummy ;isr1
_vector7:   VEC_ENTRY _vec_dummy ;isr2
_vector8:   VEC_ENTRY _vec_dummy ;isr3
_vector9:   VEC_ENTRY _vec_dummy
_vector10: VEC_ENTRY _vec_dummy
_vector11: VEC_ENTRY _vec_dummy

初始化程序

CSL_DspintcRegsOvly intcRegs = (CSL_DspintcRegsOvly)CSL_INTC_0_REGS;

uartRegs->PWREMU_MGMT = 0; // Reset UART TX & RX components
asm(" NOP 2");

uartRegs->FCR = 0x0001;
     uartRegs->FCR = 0x0007;             // Clear UART TX & RX FIFOs
     asm(" NOP 2");
     uartRegs->FCR = 0x0000;             // Non-FIFO mode

uartRegs->LCR |=0x03; //b0,b1置1

uartRegs->MCR = 0x0000; // RTS & CTS disabled

  uartRegs->MDR=1; //b0置1
  uartRegs->DLL=136;
  //uartRegs->DLH=0;

uartRegs->IER = 0x0005; // Enable interrupts
uartRegs->PWREMU_MGMT = 0xE001; // Enable TX & RX componenets

  CSR&=0xfffe;//disable global interrupt
     // connect the event to the interrupt 4
     CSL_FINS(intcRegs->INTMUX1, DSPINTC_INTMUX1_INTSEL4, CSL_INTC_EVENTID_UARTINT1);
      asm(" NOP 2");
     // set ISTP to point to the vector table address
     ISTP = (unsigned int)intcVectorTable;
       asm(" NOP 2");

     // clear all interrupts, bits 4 thru 15
     ICR = 0xfff0;
      asm(" NOP 2");

     // b0 :reset b1:NMIE   b4: INT4 enable the bits for non maskable interrupt and
     IER=0x12; //
      asm(" NOP 2");
     // enable interrupts, set GIE bit
     _enable_interrupts();

9 年多前