am335x eth1能link,ping不通

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Other Parts Discussed in Thread: AM3354

各位高手:

大家好!我做了1个 AM3354+双dp83822(100m网口)的板子,采用RGMII连接.在linx-3.2下,eth0能正常工作.eth1能link,显示速度100M/FULL.但是板子ping电脑和电脑ping板子都ping不通.wirseshark抓从板子发出的ping包. 以下是 ethtool 命令的信息

root@am335x-evm:~# ethtool eth1
Settings for eth1:
        Supported ports: [ TP AUI BNC MII FIBRE ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes: 10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 3
        Transceiver: external
        Auto-negotiation: on
        Current message level: 0x00000000 (0)

        Link detected: yes

再发一个eth0的

root@am335x-evm:~# ethtool eth0
Settings for eth0:
        Supported ports: [ TP AUI BNC MII FIBRE ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes: 10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 1
        Transceiver: external
        Auto-negotiation: on
        Current message level: 0x00000000 (0)

        Link detected: yes

在UBOOT下.测量 RGMII1_TCLK的频率是25MHZ(正常情况).而RGMII2_TCLK则量的频率(很不稳定,最高也就125kmz).网口2引脚配置如下:

static struct module_pin_mux rgmii2_pin_mux[] = {
   {OFFSET(gpmc_a0), MODE(2)},           /* RGMII2_TCTL */
   {OFFSET(gpmc_a1), MODE(2) | RXACTIVE},   /* RGMII2_RCTL */
   {OFFSET(gpmc_a2), MODE(2)},           /* RGMII2_TD3 */
   {OFFSET(gpmc_a3), MODE(2)},           /* RGMII2_TD2 */
   {OFFSET(gpmc_a4), MODE(2)},           /* RGMII2_TD1 */
   {OFFSET(gpmc_a5), MODE(2)},           /* RGMII2_TD0 */
   {OFFSET(gpmc_a6), MODE(2)},           /* RGMII2_TCLK */
   {OFFSET(gpmc_a7), MODE(2) | RXACTIVE},   /* RGMII2_RCLK */
   {OFFSET(gpmc_a8), MODE(2) | RXACTIVE},   /* RGMII2_RD3 */
   {OFFSET(gpmc_a9), MODE(2) | RXACTIVE},   /* RGMII2_RD2 */
   {OFFSET(gpmc_a10), MODE(2) | RXACTIVE},   /* RGMII2_RD1 */
   {OFFSET(gpmc_a11), MODE(2) | RXACTIVE},   /* RGMII2_RD0 */
   {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
   {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},   /* MDIO_CLK */
   {-1},
};