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TMS320C6678: 关于DDR能否被Cache访问的问题,需要每个核单独配置MAR吗?

Part Number: TMS320C6678


如题,如果核0运行了CACHE_enableCaching (128);,那么其余核能Cache这一段内存的吗,还是需要每个核都CACHE_enableCaching (128)呢?