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我想将u-boot从1GB（4块K4B2G1646B）修改到2GB（4块K4B4G1646B）
时序修改为796的
DMM_LISA_MAP__0~3也修改了！
修改完成之后在2GB 的ddr跑不起来，只有一个灯闪烁一下之后就没有任何反映了！
uboot需要关注ddr_defs_ti816x.h：
/* For 796 MHz */#if defined(CONFIG_TI816X_DDR3_796)#define EMIF_TIM1 0x1779C9FE#define EMIF_TIM2 0x50608074#define EMIF_TIM3 0x009F857F#define EMIF_SDREF 0x10001841#define EMIF_SDCFG 0x62A73832#define EMIF_PHYCFG 0x00000110
#define WR_DQS_RATIO_BYTE_LANE3 ((0x4a << 10) | 0x4a)#define WR_DQS_RATIO_BYTE_LANE2 ((0x4a << 10) | 0x4a)#define WR_DQS_RATIO_BYTE_LANE1 ((0x4a << 10) | 0x4a)#define WR_DQS_RATIO_BYTE_LANE0 ((0x4a << 10) | 0x4a)
#define WR_DATA_RATIO_BYTE_LANE3 (((0x4a + 0x40) << 10) | (0x4a + 0x40))#define WR_DATA_RATIO_BYTE_LANE2 (((0x4a + 0x40) << 10) | (0x4a + 0x40))#define WR_DATA_RATIO_BYTE_LANE1 (((0x4a + 0x40) << 10) | (0x4a + 0x40))#define WR_DATA_RATIO_BYTE_LANE0 (((0x4a + 0x40) << 10) | (0x4a + 0x40))
#define RD_DQS_RATIO ((0x40 << 10) | 0x40)
#define DQS_GATE_BYTE_LANE0 ((0x13a << 10) | 0x13a)#define DQS_GATE_BYTE_LANE1 ((0x13a << 10) | 0x13a)#define DQS_GATE_BYTE_LANE2 ((0x13a << 10) | 0x13a)#define DQS_GATE_BYTE_LANE3 ((0x13a << 10) | 0x13a)
在修改完U-BOOT以后，编译的时候是否MLO也要重新再编译一次！
