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AWR2243: 通过SPI接口对AWR2243(单芯片)进行配置,触发FrameStart后,CSI接口的CLK和line没有输出

Part Number: AWR2243


你好,

       我这边按照手册通过SPI配置AWR2243,使能FrameStart后可以收到RF_ASYNC_EVENT_MSG1的Frame Trigger Ready以及Frame End的回复,但是 CSI接口上的CLK和line没有信号输出

       我的配置流程:

              1. 控制AWR2243复位引脚,等待MSS_POWERUP_COMPLETE回复,回复状态为缺少MetaHearer

              2. 通过SPI加载xwr22xx_metaImage.h文件里的固件数组,每一包发送都有ACK回复,发送完成后未有图中左边红框的MSS_BOOTERRSTATUS回复;下图右边的红框提示如果没有连接Flash才等0x5005事件,现在的设计上是通过QSPI连接了一片Flash的,所以是否不会有MSS_BOOTERRSTATUS的回复?  加载固件后怎么确定固件是否加载成功?

                       

                3. 使能RF PowerUp,接收到回复的数据为: ba dc cd ab 36 a0 22 00 0c 00 00 00 01 00 9a 5f    01 50     14 00     fb fe 3b 07 76 50 21 00 10 00 00 00 00 00 00 00      20 61 

                4. 配置Static_Conf_Set相关寄存器

                           a. AWR_RF_DEVICE_CFG_SB         配置ASYNC_EVENT_DIR为BSS TO HOST

                                                                                       配置MONITORING_ASYNC_EVENT_DIR为BSS TO HOST 

                                                                                       使能FRAME_START_ASYNC_EVENT和FRAME_STOP_ASYNC_EVENT

                                                                                       使能INTER_BURST_POWER_SAVE

                                                                                       关闭WDT

                                                                                       ASYNC_EVENT_CRC设置为32bit

                           b. AWR_CHAN_CONF_SET_SB     使能4路RX和TX0

                                                                                    配置为单Chip模式

                                                                                    关闭FM_CW_CLKOUT_MASTER,   FM_CW_SYNCOUT_MASTER,  FM_CW_CLKOUT_SLAVE,  FM_CW_SYNCOUT_SLAVE,  INTLO_MASTER,   INTFRC_MASTER

                                                                                    打开OSCCLKOUT(用于给外部FPGA做时钟源)

                           c. AWR_ADCOUT_CONF_SET_SB   配置adc为12bit,Reduse Full Scale Bits为0,仅要real

                           d. AWR_RF_RADAR_MISC_CTL_SB    全配置为0

                5. DATA_PATH设置

                           a. AWR_DEV_RX_DATA_FORMAT_CONF_SB   按照需求配置了adc的数据格式

                           b. AWR_DEV_RX_DATA_PATH_CONF_SET_SB    配置为CSI接口模式

                           c. AWR_DEV_RX_DATA_PATH_CLK_SET_SB     配置为CLK_DDR模式,速率为150M

                           d. AWR_HIGHSPEEDINTFCLK_CONF_SET_SB   配置为300M

                           e. AWR_DEV_CSI2_CFG_SET_SB     按默认Lane0在Pos1,Lane1在Pos2,Lane2在Pos4, Lane3在Pos5, CLK在Pos3,所有线都设置为POL_PLUSMINUS;  使能LineStartEnd

            6. 配置RF INIT,等待回复RF_AE_INITCALIBSTATUS_SB的数据为: ba dc cd ab 32 20 28 00 0c 04 00 00 01 00 98 db     04 10    18 00    fe 0f 00 80 fc 0f 00 00 23 00 00 00 3b 04 00 00 0f 00 00 00      c7 aa 9e 4d

                   

            7. 配置Profile信息,采样点为64; 

            8. 配置CHIRP_CONF_SET,绑定Profile0,ChirpStartIndex和ChirpEndIndex为0,仅设置1种chirp

            9. 配置AWR_FRAME_CONF_SB,  ChirpStartIndex和ChirpEndIndex为0;  NumLoops为1;   NumFrames为64

            10. 配置AWR_DEV_FRAME_CONF_SB,    NumChirps为64;    HalfWordsPerChirp为64(采样点为64,只传输real)

            11. 使能FrameStart,可以收到RF_ASYNC_EVENT_MSG1的Frame Trigger Ready,等待一会后再次收到Frame End的回复

      按照上述步骤执行完后,CSI接口上CLK和Lane一直没有输出, 请问我可以从哪些方面排查此问题呢? 问题困扰几天了,期望得到回复,感谢

  • 您好,您的问题我们需要升级到英文论坛寻求帮助,有答复尽快给到您。

  • 您好,

    是使用设置了 DCA1000 EVM 的 AWr2243吗?

    您使用的是自制电路板吗? 

  • 自制的电路板,读到版本号为V1.1

  • 您好,

    在最终确定此序列之前,您是否使用过 AWR2243 EVM 以及 Studio 对此进行了验证? 

  • #
    #For detailed view of mmWave Radar configuration structure
    #please refer 
    #ti\control\mmwavelink\docs\doxygen\html\index.html
    #
    
    #
    #Global configuration
    #Advanced frame test enable/disable; 1 - Advanced frame; 0 - Legacy frame
    #Continuous mode test enable/disable; 1 - Enable; 0 - Disable
    #Dynamic chirp test enable/disable; 1 - Enable; 0 - Disable; This should not be enabled if Advanced chirp test is enabled
    #Dynamic profile test enable/disable; 1 - Enable; 0 - Disable
    #Advanced chirp test enable/disable; 1 - Enable; 0 - Disable; The legacy chirp API is not required if this is enabled
    #Firmware download enable/disable; 1 - Enable; 0 - Disable
    #mmWaveLink logging enable/disable; 1 - Enable; 0 - Disable
    #Calibration enable/disable; To perform calibration store/restore; 1 - Enable; 0 - Disable
    #Calibration Store/Restore; If CalibEnable = 1, then whether to store/restore; 1 - Store; 0 - Restore
    #Transport mode; 1 - I2C; 0 - SPI
    #Flash connected enable/disable; 1 - Enable; 0 - Disable
    #
    LinkAdvanceFrameTest=0;
    LinkContModeTest=0;
    LinkDynChirpTest=1;
    LinkDynProfileTest=0;
    LinkAdvChirpTest=0;
    EnableFwDownload=1;
    EnableMmwlLogging=0;
    CalibEnable=0;
    CalibStoreRestore=1;
    TransferMode=0;
    IsFlashConnected=1;
    #END
    
    #
    #power on master arguments, please modify if needed.
    #rlClientCbs_t: crcType 0:16Bit/1:32Bit/2:64Bit, ackTimeout
    #
    crcType=1;
    ackTimeout=1000;
    #END
    
    #
    #channel config parameters, please modify if needed.
    #rlChanCfg_t
    #
    channelTx=3;
    channelRx=15;
    cascading=0;
    #END
    
    #
    #ADC out config parameters, please modify if needed.
    #rlAdcOutCfg_t
    #
    adcBits=2;
    adcFormat=2;
    #END
    
    #
    #DATA format config parameters, please modify if needed.
    #rlDevDataFmtCfg_t
    #
    rxChanEn=15;
    adcBitsD=2;
    adcFmt=1;
    iqSwapSel=0;
    chInterleave=0;
    #END
    
    #
    #Low power config Paramters, please modify if needed.
    #rlLowPowerModeCfg_t
    #
    anaCfg=0;
    lpAdcMode=0;
    #END
    
    #
    #Data Path config parameters, please modify if needed
    #rlDevDataPathCfg_t
    #
    intfSel=1;
    transferFmtPkt0=1;
    transferFmtPkt1=0;
    cqConfig=2;
    cq0TransSize=64;
    cq1TransSize=64;
    cq2TransSize=64;
    #END
    
    #
    #LVDS clock config parameters, please modify if needed
    #rlDevDataPathClkCfg_t
    #
    laneClk=1;
    dataRate=1;
    #END
    
    #
    #SET HSI clock parameters, please modify if needed.
    #rlDevHsiClk_t
    #
    hsiClk=9
    #END
    
    #
    #LANE config parameters, please modify if needed.
    #rlDevLaneEnable_t
    #
    laneEn=15;
    #END
    
    #
    #LVDS Lane Config parameters, please modify if needed.
    #rlDevLvdsLaneCfg_t
    #
    laneFmtMap=0;
    laneParamCfg=1;
    #END
    
    #
    #Programmable Filter config parameters, please modify if needed.
    #rlRfProgFiltConf_t
    #
    profileId=0;
    coeffStartIdx=0;
    progFiltLen=14;
    progFiltFreqShift=100;
    #END
    
    #
    #Profile config parameters, please modify if needed.
    #rlProfileCfg_t
    #
    profileId=0;
    pfVcoSelect=2;
    startFreqConst=1439117143;
    idleTimeConst=1000;
    adcStartTimeConst=600;
    rampEndTime=6000;
    txOutPowerBackoffCode=0;
    txPhaseShifter=0;
    freqSlopeConst=621;
    txStartTime=0;
    numAdcSamples=256;
    digOutSampleRate=10000;
    hpfCornerFreq1=0;
    hpfCornerFreq2=0;
    rxGain=30;
    #END
    
    #
    #Profile config parameters, please modify if needed.
    #rlProfileCfg_t
    #
    profileId=1;
    pfVcoSelect=2;
    startFreqConst=1439117143;
    idleTimeConst=1000;
    adcStartTimeConst=700;
    rampEndTime=6000;
    txOutPowerBackoffCode=0;
    txPhaseShifter=0;
    freqSlopeConst=621;
    txStartTime=0;
    numAdcSamples=256;
    digOutSampleRate=10000;
    hpfCornerFreq1=0;
    hpfCornerFreq2=0;
    rxGain=30;
    #END
    
    #
    #Profile config parameters, please modify if needed.
    #rlProfileCfg_t
    #
    profileId=2;
    pfVcoSelect=2;
    startFreqConst=1439117143;
    idleTimeConst=1000;
    adcStartTimeConst=800;
    rampEndTime=6000;
    txOutPowerBackoffCode=0;
    txPhaseShifter=0;
    freqSlopeConst=621;
    txStartTime=0;
    numAdcSamples=256;
    digOutSampleRate=10000;
    hpfCornerFreq1=0;
    hpfCornerFreq2=0;
    rxGain=30;
    #END
    
    #
    #Profile config parameters, please modify if needed.
    #rlProfileCfg_t
    #
    profileId=3;
    pfVcoSelect=2;
    startFreqConst=1439117143;
    idleTimeConst=1000;
    adcStartTimeConst=900;
    rampEndTime=6000;
    txOutPowerBackoffCode=0;
    txPhaseShifter=0;
    freqSlopeConst=621;
    txStartTime=0;
    numAdcSamples=256;
    digOutSampleRate=10000;
    hpfCornerFreq1=0;
    hpfCornerFreq2=0;
    rxGain=30;
    #END
    
    #
    #Chirp Configuration parameters, please modify if needed.
    #rlChirpCfg_t
    #
    chirpStartIdx=0;
    chirpEndIdx=63;
    profileIdCPCFG=0;
    startFreqVar=0;
    freqSlopeVar=0;
    idleTimeVar=0;
    adcStartTimeVar=0;
    txEnable=1;
    #END
    
    #
    #Chirp Configuration parameters, please modify if needed.
    #rlChirpCfg_t
    #
    chirpStartIdx=64;
    chirpEndIdx=127;
    profileIdCPCFG=0;
    startFreqVar=0;
    freqSlopeVar=0;
    idleTimeVar=0;
    adcStartTimeVar=0;
    txEnable=2;
    #END
    
    #
    #Frame configuration parameters, please modify if needed.
    #rlFrameCfg_t
    #
    chirpStartIdxFCF=0;
    chirpEndIdxFCF=127;
    frameCount=50;
    loopCount=1;
    periodicity=20000000;
    triggerDelay=0;
    numAdcSamples=512;
    triggerSelect=1;
    #END
    
    #
    #Advance Frame configuration parameters, please modify if needed.
    numOfSubFrames=4;
    forceProfile=0;
    numFrames=100;
    loopBackCfg=0;
    triggerSelect=1;
    frameTrigDelay=0;
    #end
    
    #
    #4th sub Frame configuration parameters, please modify if needed.
    forceProfileIdx=0;
    chirpStartIdxAF=0;
    numOfChirps=1;
    numLoops=8;
    burstPeriodicity=5000000;
    chirpStartIdxOffset=0;
    numOfBurst=1;
    numOfBurstLoops=1;
    subFramePeriodicity=5000000;
    numAdcSamplesAF=256
    numChirpsInDataPacket=1
    #end
    
    #
    #3rd sub Frame configuration parameters, please modify if needed.
    forceProfileIdx=0;
    chirpStartIdxAF=0;
    numOfChirps=1;
    numLoops=8;
    burstPeriodicity=5000000;
    chirpStartIdxOffset=0;
    numOfBurst=1;
    numOfBurstLoops=1;
    subFramePeriodicity=5000000;
    numAdcSamplesAF=256
    numChirpsInDataPacket=1
    #end
    
    #
    #2nd sub Frame configuration parameters, please modify if needed.
    forceProfileIdx=0;
    chirpStartIdxAF=0;
    numOfChirps=1;
    numLoops=8;
    burstPeriodicity=5000000;
    chirpStartIdxOffset=0;
    numOfBurst=1;
    numOfBurstLoops=1;
    subFramePeriodicity=5000000;
    numAdcSamplesAF=256
    numChirpsInDataPacket=1
    #end
    
    #
    #1st sub Frame configuration parameters, please modify if needed.
    forceProfileIdx=0;
    chirpStartIdxAF=0;
    numOfChirps=1;
    numLoops=8;
    burstPeriodicity=5000000;
    chirpStartIdxOffset=0;
    numOfBurst=1;
    numOfBurstLoops=1;
    subFramePeriodicity=5000000;
    numAdcSamplesAF=256
    numChirpsInDataPacket=1
    #end
    
    #
    #Continuous mode config parameters
    #startFreqConst=1435384036;
    #txOutPowerBackoffCode=0;
    #txPhaseShifter=0;
    #digOutSampleRate=10000;
    #hpfCornerFreq1=0;
    #hpfCornerFreq2=0;
    contModeRxGain=30;
    vcoSelect=3388;
    #end
    
    #
    #Advanced chirp config parameters
    AdvChirp_chirpParamIdx=0;
    AdvChirp_resetMode=0;
    AdvChirp_deltaResetPeriod=0;
    AdvChirp_deltaParamUpdatePeriod=0;
    AdvChirp_sf0ChirpParamDelta=0;
    AdvChirp_sf1ChirpParamDelta=0;
    AdvChirp_sf2ChirpParamDelta=0;
    AdvChirp_sf3ChirpParamDelta=0;
    AdvChirp_lutResetPeriod=4;
    AdvChirp_lutParamUpdatePeriod=1;
    AdvChirp_lutPatternAddressOffset=0;
    AdvChirp_numPatterns=4;
    AdvChirp_lutBurstIndexOffset=0;
    AdvChirp_lutSfIndexOffset=0;
    AdvChirp_lutChirpParamSize=0;
    AdvChirp_lutChirpParamScale=0;
    AdvChirp_maxTxPhShifIntDither=0;
    #end
    
    #
    #Advanced chirp Profile config LUT parameters
    #Each data parameter is 4 bits
    AdvChirpLUT_ProfileConfig_LUTAddrOff=0;
    AdvChirpLUT_ProfileConfig_Data1=0;
    AdvChirpLUT_ProfileConfig_Data2=1;
    AdvChirpLUT_ProfileConfig_Data3=2;
    AdvChirpLUT_ProfileConfig_Data4=3;
    #end
    
    #
    #Advanced chirp Start Freq config LUT parameters
    #The Start Freq data is in GHz
    #Each data parameter is 1 or 2 or 4 bytes depending on ParamSize
    # ParamSize    Size in bytes
    #     0             4
    #     1             2
    #     2             1
    AdvChirpLUT_StartFreqConfig_LUTAddrOff=4;
    AdvChirpLUT_StartFreqConfig_ParamSize=1;
    AdvChirpLUT_StartFreqConfig_ParamScale=0;
    AdvChirpLUT_StartFreqConfig_Data1=-0.000001;
    AdvChirpLUT_StartFreqConfig_Data2=0.000000;
    AdvChirpLUT_StartFreqConfig_Data3=0.000001;
    AdvChirpLUT_StartFreqConfig_Data4=-0.000001;
    #end
    
    #
    #Advanced chirp Freq Slope config LUT parameters
    #The Freq Slope data is in MHz/us
    #Each data parameter is 1 byte
    AdvChirpLUT_FreqSlopeConfig_LUTAddrOff=12;
    AdvChirpLUT_FreqSlopeConfig_Data1=-0.050;
    AdvChirpLUT_FreqSlopeConfig_Data2=0.000;
    AdvChirpLUT_FreqSlopeConfig_Data3=-0.050;
    AdvChirpLUT_FreqSlopeConfig_Data4=0.050;
    #end
    
    #
    #Advanced chirp Idle time config LUT parameters
    #The Idle time data is in us
    #Each data parameter is 1 or 2 bytes depending on ParamSize
    # ParamSize    Size in bytes
    #     0             2
    #     1             1
    AdvChirpLUT_IdleTimeConfig_LUTAddrOff=16;
    AdvChirpLUT_IdleTimeConfig_ParamSize=0;
    AdvChirpLUT_IdleTimeConfig_ParamScale=0;
    AdvChirpLUT_IdleTimeConfig_Data1=0.01;
    AdvChirpLUT_IdleTimeConfig_Data2=0.02;
    AdvChirpLUT_IdleTimeConfig_Data3=0.00;
    AdvChirpLUT_IdleTimeConfig_Data4=0.01;
    #end
    
    #
    #Advanced chirp ADC time config LUT parameters
    #The ADC start time data is in us
    #Each data parameter is 1 or 2 bytes depending on ParamSize
    # ParamSize    Size in bytes
    #     0             2
    #     1             1
    AdvChirpLUT_ADCTimeConfig_LUTAddrOff=24;
    AdvChirpLUT_ADCTimeConfig_ParamSize=0;
    AdvChirpLUT_ADCTimeConfig_ParamScale=0;
    AdvChirpLUT_ADCTimeConfig_Data1=0.02;
    AdvChirpLUT_ADCTimeConfig_Data2=0.01;
    AdvChirpLUT_ADCTimeConfig_Data3=0.00;
    AdvChirpLUT_ADCTimeConfig_Data4=0.01;
    #end
    
    #
    #Advanced chirp Tx Enable config LUT parameters
    #Each data parameter is 4 bits
    #b0:TX0 ; b1:TX1; b2:TX2
    AdvChirpLUT_TxEnConfig_LUTAddrOff=32;
    AdvChirpLUT_TxEnConfig_Data1=7;
    AdvChirpLUT_TxEnConfig_Data2=3;
    AdvChirpLUT_TxEnConfig_Data3=1;
    AdvChirpLUT_TxEnConfig_Data4=2;
    #end
    
    #
    #Advanced chirp BPM Enable config LUT parameters
    #Each data parameter is 4 bits
    #b0:TX0 ; b1:TX1; b2:TX2
    AdvChirpLUT_BpmEnConfig_LUTAddrOff=36;
    AdvChirpLUT_BpmEnConfig_Data1=7;
    AdvChirpLUT_BpmEnConfig_Data2=3;
    AdvChirpLUT_BpmEnConfig_Data3=1;
    AdvChirpLUT_BpmEnConfig_Data4=2;
    #end
    
    #
    #Advanced chirp Tx0 Phase Shifter config LUT parameters
    #The phase shifter data is in degrees
    #Each data parameter is 1 byte
    AdvChirpLUT_Tx0PhShiftConfig_LUTAddrOff=40;
    AdvChirpLUT_Tx0PhShiftConfig_Data1=5.625;
    AdvChirpLUT_Tx0PhShiftConfig_Data2=11.250;
    AdvChirpLUT_Tx0PhShiftConfig_Data3=16.875;
    AdvChirpLUT_Tx0PhShiftConfig_Data4=16.875;
    #end
    
    #
    #Advanced chirp Tx1 Phase Shifter config LUT parameters
    #The phase shifter data is in degrees
    #Each data parameter is 1 byte
    AdvChirpLUT_Tx1PhShiftConfig_LUTAddrOff=44;
    AdvChirpLUT_Tx1PhShiftConfig_Data1=0.000;
    AdvChirpLUT_Tx1PhShiftConfig_Data2=5.625;
    AdvChirpLUT_Tx1PhShiftConfig_Data3=0.000;
    AdvChirpLUT_Tx1PhShiftConfig_Data4=5.625;
    #end
    
    #
    #Advanced chirp Tx2 Phase Shifter config LUT parameters
    #The phase shifter data is in degrees
    #Each data parameter is 1 byte
    AdvChirpLUT_Tx2PhShiftConfig_LUTAddrOff=48;
    AdvChirpLUT_Tx2PhShiftConfig_Data1=5.625;
    AdvChirpLUT_Tx2PhShiftConfig_Data2=0.000;
    AdvChirpLUT_Tx2PhShiftConfig_Data3=5.625;
    AdvChirpLUT_Tx2PhShiftConfig_Data4=0.000;
    #end
    

    没有,这个序列是根据官方例程,mmWaveLink_SingleChirp_Example移植过来的,所有的配置参数是按照例程中的txt文件进行配置

  • 您好,

    如果是根据 mmWaveLink_SingleChirp_Example 进行了移植,那么配置应该是没问题的。 由于这是您的自制板,您是否验证了 CSI 的原理图可以正常工作?