config init code
aic3104_register_write(101, 0x00); /// CODEC_CLKIN uses PLLDIV_OUT
aic3104_register_write(3, 0x93); //// PLL enable, PLL Q value: 2 ,PLL P value: 3
aic3104_register_write(4, (0x04<<2) & 0xfc); //// PLL J value: 4
aic3104_register_write(5, ((0 << 2)>>8) & 0xff); /// PLL D value: (0 *4) / 256
aic3104_register_write(6, (0 << 2) & 0xff); //// PLL D value: (0 *4) % 256
aic3104_register_write(11, 0x04); //// PLL R value: 4
aic3104_register_write(8,0xD0);
aic3104_register_write(9,0x47); //// DSP mode
aic3104_register_write(2, 0xAA); //// ADC and DAC fs, delate this for 48K, use this for 8K
aic3104_register_write(17, 0xFF);
aic3104_register_write(18, 0xFF);
aic3104_register_write(19, 0x78);
aic3104_register_write(21, 0x78);
aic3104_register_write(22, 0x78);
aic3104_register_write(24, 0x78);
aic3104_register_write(26, 0x00);
aic3104_register_write(28, 0x00);
aic3104_register_write(29, 0x00);
aic3104_register_write(31, 0x00);
aic3104_register_write(32, 0x00);
aic3104_register_write(33, 0x00);
aic3104_register_write(15, 0x00);
aic3104_register_write(16, 0x00);
// aic3104_register_write(25, 0x80);
aic3104_register_write(7, 0x0C);
aic3104_register_write(37, 0xC0);
aic3104_register_write(43, 0x00);
aic3104_register_write(44, 0x00);
aic3104_register_write(82, 0x80); //// DAC_L1 is routed to LEFT_LOP/M.
aic3104_register_write(86, 0x8B);
Open mic2R to right adc
aic3104_register_write(7, 0x00);
aic3104_register_write(37, 0x00);
aic3104_register_write(82, 0x00);
aic3104_register_write(86, 0x02);
aic3104_clear_bits(37, 0x40);
aic3104_register_write(18, 0xF0);
aic3104_register_write(22, 0x7C);
这样测试dsp是没有数据的。3104MIC2.doc
