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LMK04821: single-loop mode,PLL2不能lock

Part Number: LMK04821

我们使用LMK04821芯片的单PLL模式,从OSCin输入125Mhz的差分时钟,配置参数如下。

测试中发现,输出的时钟频率基本上是对的,但PLL2不能lock。

请问可能是什么原因?需要如何调查和解决这个问题?谢谢!

lmk04821_single_pll_OSCin_VCO0.tcs