Hello，
The PS side of the Xilinx board connects the DP83867IR through RGMII mode, runs the self-negotiation program through the SDK (the program includes the PHY register writing), and the program shows that the MAC address is successfully assigned. But the current phenomenon is that the host computer can't identify the network and can't ping the MAC address. The following is the self-negotiated register state.
Register 0000 is: 1140
Register 0001 is: 796D
Register 0002 is: 2000
Register 0003 is: A231
Register 0004 is: 0D41
Register 0005 is: CDE1/LP广播
Register 0006 is: 006F
Register 0007 is: 2001
Register 0008 is: 0000
Register 0009 is: 0200
Register 000A is: 3800/LP广播
Register 000B is: 0000
Register 000C is: 0000
Register 000D is: 401F
Register 000E is: 0000
Register 000F is: 3000
Register 0010 is: 5848
Register 0011 is: AC02
Register 0012 is: EC10
Register 0013 is: 1D46
Register 0014 is: 2BC7
Register 0015 is: 0000
Register 0016 is: 0000
Register 0017 is: 0040
Register 0018 is: 6150
Register 0019 is: 4444
Register 001A is: 0002
Register 001B is: 0000
Register 001C is: 0000
Register 001D is: 0000
Register 001E is: 0282
Register 001F is: 0000
In the case of self-negotiation to 1000Mbps, the following figure shows the waveforms of RXC and TXC at the normal frequency of 125Mhz. But it's not a square wave. The 100Mbps case is also a 25Mhz sine wave. Only 10MBPS would be a 2.5MHZ square wave. The captured RXD3 waveform shows that there is data passing through and the data is only square wave if it is 10MBPS. But even 10MBPS won't work. TXD has no data at all.
At 10Mbps, this is the timing diagram for RXC and RXD3. About 2.5 to 3ns before the rising edge comes.
After measuring, I found that the pendulum swing of XI's external crystal input is about 1.22VPP, and the oscillator given by the official needs 1.5-1.9VPP. If it is crystal input, is 1.2VPP also working normally?
