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器件型号：TMS320F280039C 工具/软件：
尊敬的 TI 专家：
我在应用程序中的 CLA 实现存在问题。 我使用从闪存运行的 TMS320F280039C、具有由 ADCA1和 ADCA2触发的两个 CLA 任务。
在一个特定的示例板上、Cla1ToCpuMsgRAM 中的所有变量始终返回零值。 但是、如果我将电路板连接到 CCS 并在调试模式下运行它、Cla1ToCpuMsgRAM 变量会返回正常的预期值。 一旦我断开与 CCS 调试模式的连接、执行电源复位并从闪存引导、问题就会再次出现：所有 Cla1ToCpuMsgRAM 变量返回零。
在 CPU 上运行的其余应用程序似乎正常工作。
我的问题是：这是否表示可能存在 MCU 或硬件缺陷、或者我的 CLA 实施是否存在问题？
下面是有关如何初始化 CLA 的更多信息：
如果您想添加或澄清任何细节、请告诉我！
CLA 初始化
/* CLA to CPU Main Control */
typedef struct {
float32_t adc_processed_value_1;
float32_t adc_processed_value_2;
float32_t adc_processed_value_3;
float32_t adc_processed_value_4;
float32_t adc_processed_value_5;
} cla2cpu_main_t;
#pragma DATA_SECTION(cla2cpu_main, "Cla1ToCpuMsgRAM");
cla2cpu_main_t cla2cpu_main;
void Init_cla(void)
{
extern uint32_t Cla1ProgRunStart, Cla1ProgLoadStart, Cla1ProgLoadSize;
memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize);
EALLOW;
CpuSysRegs.PCLKCR0.bit.CLA1 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS3 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS3 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 0;
#pragma diag_suppress = 770
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_2, (uint16_t)&Cla1Task1);
CLA_setTriggerSource(CLA_TASK_2, CLA_TRIGGER_ADCA1);
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_3, (uint16_t)&Cla1Task2);
CLA_setTriggerSource(CLA_TASK_3, CLA_TRIGGER_ADCA2);
#pragma diag_warning = 770
CLA_disableBackgroundTask(CLA1_BASE);
CLA_enableIACK(CLA1_BASE);
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_8);
asm(" IACK #0x0080");
asm(" RPT #3 || NOP");
while (Cla1Regs.MIRUN.bit.INT8 == 1) {
};
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_1);
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_2);
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_3);
EDIS;
}
链接器
MEMORY
{
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000002D8
RAMM1 : origin = 0x00000400, length = 0x000003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMLS0_2 : origin = 0x00008000, length = 0x00001800 //LS0, LS1, LS2
RAMLS3_4 : origin = 0x00009800, length = 0x00001000 //LS3, LS4
RAMLS5 : origin = 0x0000A800, length = 0x00000800
RAMLS6 : origin = 0x0000B000, length = 0x00000800
RAMLS7 : origin = 0x0000B800, length = 0x00000800
RAMGS0 : origin = 0x0000C000, length = 0x00001000
RAMGS1 : origin = 0x0000D000, length = 0x00001000
RAMGS2 : origin = 0x0000E000, length = 0x00001000
RAMGS3 : origin = 0x0000F010, length = 0x00000FE8
// RAMGS3_RSVD : origin = 0x000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
BOOTROM : origin = 0x003F8000, length = 0x00007FC0
SECURE_ROM : origin = 0x003F2000, length = 0x00006000
RESET : origin = 0x003FFFC0, length = 0x00000002
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 20012000
GROUP { /* GROUP memory ranges for crc/checksum of entire flash */
#endif
#endif
/* Flash sectors */
/* BANK 0 */
BEGIN : origin = 0x00080000, length = 0x00000002
FLASH_BANK0_SEC0_7 : origin = 0x080002, length = 0x007FFE
FLASH_BANK0_SEC8_15 : origin = 0x088000, length = 0x008000
/* BANK 1 */
FLASH_BANK1_SEC0_3 : origin = 0x090000, length = 0x004000
FLASH_BANK1_SEC4_7 : origin = 0x094000, length = 0x004000
FLASH_BANK1_SEC8_11 : origin = 0x098000, length = 0x004000
FLASH_BANK1_SEC12_15 : origin = 0x09C000, length = 0x004000
/* BANK 2 */
FLASH_BANK2_SEC0 : origin = 0x0A0000, length = 0x001000
FLASH_BANK2_SEC1 : origin = 0x0A1000, length = 0x001000
FLASH_BANK2_SEC2 : origin = 0x0A2000, length = 0x001000
FLASH_BANK2_SEC3 : origin = 0x0A3000, length = 0x001000
FLASH_BANK2_SEC4 : origin = 0x0A4000, length = 0x001000
FLASH_BANK2_SEC5 : origin = 0x0A5000, length = 0x001000
FLASH_BANK2_SEC6 : origin = 0x0A6000, length = 0x001000
FLASH_BANK2_SEC7 : origin = 0x0A7000, length = 0x001000
/*
FLASH_BANK2_SEC15_DO_NOT_USE : origin = 0x0AFFF0, length = 0x000010*/ /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 20012000
} crc(_ccs_flash_checksum, algorithm=C28_CHECKSUM_16)
#endif
#endif
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
SECTIONS
{
codestart : > BEGIN, ALIGN(8)
.text : >> FLASH_BANK0_SEC0_7 | FLASH_BANK0_SEC8_15 | FLASH_BANK1_SEC0_3, ALIGN(8)
.cinit : > FLASH_BANK1_SEC4_7, ALIGN(8)
.switch : > FLASH_BANK1_SEC4_7, ALIGN(8)
.reset : > RESET, TYPE = DSECT /* not used, */
.stack : > RAMM1
.init_array : > FLASH_BANK1_SEC4_7, ALIGN(8)
.bss : >> RAMLS6 | RAMLS7 | RAMGS0
.bss:output : > RAMLS6
.bss:cio : > RAMLS0_2
.data : >> RAMLS7 | RAMGS0 | RAMGS1
.sysmem : >> RAMLS6 | RAMLS7
.const : > FLASH_BANK1_SEC8_11, ALIGN(8)
//ramgs0 : > RAMGS0
//ramgs1 : > RAMGS0
/* Allocate IQ math areas: */
IQmath : > FLASH_BANK1_SEC8_11, ALIGN(8)
IQmathTables : > FLASH_BANK1_SEC8_11, ALIGN(8)
// CLA Sections
/* CLA specific sections */
Cla1Prog : LOAD = FLASH_BANK1_SEC12_15,
RUN = RAMLS3_4,
LOAD_START(Cla1ProgLoadStart),
RUN_START(Cla1ProgRunStart),
LOAD_SIZE(Cla1ProgLoadSize),
ALIGN(8)
.scratchpad : > RAMLS5
.bss_cla : > RAMLS5
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH
CLADataLS1 : > RAMLS5
.const_cla : LOAD = FLASH_BANK2_SEC0,
RUN = RAMLS5,
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize),
ALIGN(4)
GROUP
{
.TI.ramfunc
{ -l FAPI_F28003x_EABI_v1.58.01.lib}
} LOAD = FLASH_BANK1_SEC12_15,
RUN = RAMLS0_2,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
/* crc/checksum section configured as COPY section to avoid including in executable */
.TI.memcrc : type = COPY
}
lib： cla2_math_library_dataom_fpu32_eabi.lib
