[参考译文] 使用自定义 SCI 引导加载程序进行固件升级的新线程

尊敬的 Charles：

请查找以下文件供您参考、

如果您需要更多信息、请告诉我。

e2e.ti.com/.../Firmware_5F00_cmd_5F00_file.txt

e2e.ti.com/.../SCI_5F00_Bootloader_5F00_cmd_5F00_file.txt

e2e.ti.com/.../firmware_5F00_issue_5F00_txt_5F00_file.txt

e2e.ti.com/.../firmware_5F00_working_5F00_txt_5F00_file.txt  

e2e.ti.com/.../6170.kcontrol_5F00_map_5F00_file_5F00_Not_5F00_working.txt

e2e.ti.com/.../0804.kcontrol_5F00_map_5F00_file_5F00_working.txt

此致、
Aditya.

好的、感谢 Aditya、有一个问题是、这是使用的 controlCARD 正确、而不是 F28379D 器件的 LaunchPad 版本？

谢谢。此致、

Charles

是使用控制卡、不使用 LaunchPad。

此致、

Aditya.  

好的、谢谢、我需要另外一天来了解这个问题、感谢您的耐心。

此致、

Charles

尊敬的 Aditya：

下载提供的不工作固件后、会出现“数据缓冲区长度不正确“错误。 链接器命令文件 align (8) 中是否给出了每个对齐值？ 该器件的编程应采用 128 位对齐方式。 我在上面的链接器命令文件中看到、 BufferDataSection 有一个 align (4) 用于闪存编程。

从您的角度来看、可正常工作的链接器命令文件是怎样的？

对于引导加载程序、您是否通过 SCI_BOOT_ALTERNATE 引脚进行下载以进行 GPIO28/29 通信？

是否将引导模式设置为 SCI 引导模式、如果是这样、您可以通过在 CCS 存储器窗口中设置此模式 (@地址 0xD00、将值设置为 0x815A、重置 CPU1 并在执行固件更新之前运行 CPU1) 进行测试。

谢谢。此致、

Charles

尊敬的 Charles：

是的、我们使用一个利用 SCI_BOOT_ALTERNATE 引脚进行 GPIO28/29 通信的自定义 SCI 引导加载程序。

我们确定了应用程序链接器文件中的问题。 总结：

• 我们在标记为“dclfunc"的“的位置遇到程序并验证错误。

• 最初、DCL 函数与ramfunc部分结合使用。

• 在应用程序中进行一些更改后、开始出现这些错误、因为闪存扇区已满、这就是我们得到不正确数据缓冲区长度的原因。

• 然后、DCL 函数分为不同的闪存扇区、从而解决了错误。

• 此外、我们将bufferDataSection对齐更改为ALIGN(8)。

请查看应用程序链接器.cmd 文件、并告诉我该文件是否有任何问题。

/*
//###########################################################################
// FILE:    flash_programming_cpu1_FLASH.cmd
// TITLE:   Linker Command File For all F28X7x devices
//###########################################################################
// $TI Release: F2837xD Support Library v200 $
// $Release Date: Tue Jun 21 13:00:02 CDT 2016 $
// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
// The header linker files are found in <base>\F2837xD_headers\cmd
// For BIOS applications add:      F28X7x_Headers_BIOS.cmd
// For nonBIOS applications add:   F28X7x_Headers_nonBIOS.cmd
========================================================= */

/* Define the memory block start/length for the F28X7x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F28M3Xx are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block.
*/

MEMORY
{
PAGE 0:    /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

  BEGIN           	: origin = 0x086000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS03          : origin = 0x008000, length = 0x002000
/*	RAMLS1           : origin = 0x008800, length = 0x000800
    RAMLS2           : origin = 0x009000, length = 0x000800
    RAMLS3           : origin = 0x009800, length = 0x000800 */
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RAMGS14          : origin = 0x01A000, length = 0x001000
   RAMGS15          : origin = 0x01B000, length = 0x001000
   RESET           	: origin = 0x3FFFC0, length = 0x000002

	/* Flash sectors */
   FLASHA           : origin = 0x080000, length = 0x002000	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086002, length = 0x001FFE	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */

PAGE 1 :   /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

    BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
	RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
    RAMD1           : origin = 0x00B800, length = 0x000800

    RAMLS5      : origin = 0x00A800, length = 0x000800

	RAMGS0          : origin = 0x00C000, length = 0x00B000
	/*RAMGS1          : origin = 0x00D000, length = 0x001000*/
	/*RAMGS2          : origin = 0x00E000, length = 0x001000*/
	/*RAMGS3          : origin = 0x00F000, length = 0x001000
	RAMGS4          : origin = 0x010000, length = 0x001000
	RAMGS5          : origin = 0x011000, length = 0x001000
	RAMGS6          : origin = 0x012000, length = 0x001000
	RAMGS7          : origin = 0x013000, length = 0x001000
	RAMGS8          : origin = 0x014000, length = 0x001000
	RAMGS9          : origin = 0x015000, length = 0x001000
	RAMGS10         : origin = 0x016000, length = 0x001000*/
	RAMGS11         : origin = 0x017000, length = 0x001000
	RAMGS12         : origin = 0x018000, length = 0x001000
	RAMGS13         : origin = 0x019000, length = 0x001000


   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{

   /* Allocate program areas: */
   .cinit              : > FLASHD,      PAGE = 0, ALIGN(8)
   .pinit              : > FLASHD,     PAGE = 0, ALIGN(8)
   .text               : >> FLASHE | FLASHH | FLASHI | FLASHJ |FLASHK     PAGE = 0, ALIGN(8)
   codestart           : > BEGIN	PAGE = 0, ALIGN(8)
   
    GROUP
    {
        ramfuncs
        { -l F021_API_F2837xD_FPU32.lib}
     
    } LOAD = FLASHD,
      RUN  = RAMLS03, 
      LOAD_START(_RamfuncsLoadStart),
      LOAD_SIZE(_RamfuncsLoadSize),
      LOAD_END(_RamfuncsLoadEnd),
      RUN_START(_RamfuncsRunStart),
      RUN_SIZE(_RamfuncsRunSize),
      RUN_END(_RamfuncsRunEnd),
      PAGE = 0, ALIGN(8)

   dclfuncs : > FLASHG, PAGE = 0, ALIGN(8)
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1       PAGE = 1
   .ebss               : >> RAMLS5 | RAMGS0       PAGE = 1
   .esysmem            : > RAMLS5       PAGE = 1

   /* Initalized sections go in Flash */
   .econst             : >> FLASHF | FLASHG      PAGE = 0, ALIGN(8)
   .switch             : > FLASHD      PAGE = 0, ALIGN(8)

   .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   Filter_RegsFile     : > RAMGS0,	   PAGE = 1

   SHARERAMGS0		: > RAMGS0,		PAGE = 1
   SHARERAMGS1		: > RAMGS11,		PAGE = 1

   /* Flash Programming Buffer */
   BufferDataSection : > RAMD1, PAGE = 1, ALIGN(8)
   
   /* The following section definitions are required when using the IPC API Drivers */ 
    GROUP : > CPU1TOCPU2RAM, PAGE = 1 
    {
        PUTBUFFER 
        PUTWRITEIDX 
        GETREADIDX 
    }

    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }  

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

此致、

Aditya.

尊敬的 Charles：

请对此提出任何建议。

谢谢。此致、

Aditya.