[参考译文] TMS320F280025C：CAN 接收帧配置、发送正常(轮询模式)

#include "f28002x_device.h"
#include "HPTS100_can.h"

uint16_t rx_data[8];

void can_init(void)
{
    EALLOW;
    /// Configure CANA_RX
    GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1;     /// Disable the pullup on GPIO3
    GpioCtrlRegs.GPAGMUX1.bit.GPIO3 = 3;    /// To define mux position, mux position equal GPAGMUX(2bits) - GPAMUX(2bits) 0 to 15 number, here mux position equal 14 so GPAGMUX1 = 11b and GPAMUX1 = 10b.
    GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;    /// GPIO3 = CANA_RX, see pin attributes documentation for mux position.
    GpioCtrlRegs.GPADIR.bit.GPIO3 = 0;     /// GPIO3 = input
    GpioCtrlRegs.GPAINV.bit.GPIO3 = 0;   /// Not inverted GPIO input

    /// Configure CANA_TX
    GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1;     /// Disable the pullup on GPIO2
    GpioCtrlRegs.GPADIR.bit.GPIO2 = 1;     /// GPIO2 = output
    GpioCtrlRegs.GPAODR.bit.GPIO2 = 0;     /// Normal output not open drain
    GpioCtrlRegs.GPAQSEL1.bit.GPIO2 = 0;   /// Synchronous
    GpioCtrlRegs.GPAGMUX1.bit.GPIO2 = 3;   /// To define mux position, mux position equal GPBGMUX(2bits) - GPBMUX(2bits) 0 to 15 number, here mux position equal 14 so GPAGMUX1 = 11b and GPAMUX1 = 10b.
    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 2;    /// GPIO2 = CANA_TX, see pin attributes documentation  for mux position.
    /// Place CAN controller in init state, regardless of previous state.
    /// This will put controller in idle, and allow the message object RAM to be programmed.
    /// CAN module ignore bus activity during configuration.
    CanaRegs.CAN_CTL.bit.Init = 1;
    /// The CPU has write access to the configuration register.
    CanaRegs.CAN_CTL.bit.CCE = 1;
    /// Clock and timing bit configuration
    ClkCfgRegs.CLKSRCCTL2.bit.CANABCLKSEL = 0;
    /// Set up the bit rate for the CAN bus, with 250kbit/s.
    /// Bit time (Tq) = 8
    /// Bit clock prescaler = 49dec = 0x31
    /// Propagation segment (Tq) = 1
    /// Phase segment 1 (Tq) = 3dec = 0x3
    /// Phase segment 2 (Tq) = 2dec = 0x2
    /// Synchronization jump width (Tq) = 2dec = 0x2
    /// Sampling point = 62.5%
    /// Oscillator tolerance = 1.48%
    /// Set Baud rate prescaler.
    CanaRegs.CAN_BTR.bit.BRP = 0x31;
    /// Synchronization jump width.
    CanaRegs.CAN_BTR.bit.SJW = 0x2;
    /// Time segment before the sample point.
    CanaRegs.CAN_BTR.bit.TSEG1 = 0x3;
    /// Time segment after the sample point.
    CanaRegs.CAN_BTR.bit.TSEG2 = 0x2;

    /// CAN module processes messages normally
    CanaRegs.CAN_CTL.bit.Init = 0;

    setupMessageObject(1, 0x100, MSG_OBJ_TYPE_TRANSMIT);
    setupMessageObject(2, 0x010, MSG_OBJ_TYPE_RECEIVE);
    EDIS;
}

void setupMessageObject(uint32_t objID, uint32_t msgID, msgObjType msgType)
{
    if(msgType == MSG_OBJ_TYPE_TRANSMIT)
    {
        /// Use Shadow variable for IF1CMD. IF1CMD should be written to in single 32-bit write.
        union CAN_IF1CMD_REG CAN_IF1CMD_SHADOW;
        /// Wait for busy bit to clear.
        while(CanaRegs.CAN_IF1CMD.bit.Busy)
        {
        }
        /// Clear and Write out the registers to program the message object.
        CAN_IF1CMD_SHADOW.all = 0;
        CanaRegs.CAN_IF1MSK.all = 0;
        CanaRegs.CAN_IF1ARB.all = 0;
        CanaRegs.CAN_IF1MCTL.all = 0;

        /// Set the Control, Mask, and Arb bit so that they get transferred to the message object.
        /// The message control bits will be transferred from the IF1 register set to the message object.
        CAN_IF1CMD_SHADOW.bit.Control = 1;
        /// The arbitration bits will be transferred from the IF1 register set to the message object.
        CAN_IF1CMD_SHADOW.bit.Arb = 1;
        /// The mask bits (Identifier mask + Mdir + MXtd) will be transferred from the IF1 register to the message object.
        CAN_IF1CMD_SHADOW.bit.Mask = 1;
        /// Transfer direction is transferred to the message object : write
        CAN_IF1CMD_SHADOW.bit.DIR = 1;

        /// Transmit direction
        CanaRegs.CAN_IF1ARB.bit.Dir = 1;
        /// Set Message ID.
        CanaRegs.CAN_IF1ARB.bit.ID = (msgID << 18);
        /// Mail box is enabled.
        CanaRegs.CAN_IF1ARB.bit.MsgVal = 1;

        /// Set the data length since this is set for all transfers. This is also a single transfer and not a FIFO transfer so set EOB bit.
        /// Data frame has 8 data bytes
        CanaRegs.CAN_IF1MCTL.bit.DLC = 9;
        /// The message object is a single message object or the last message object in a FIFO buffer.
        CanaRegs.CAN_IF1MCTL.bit.EoB = 1;

        /// Transfer data to message object RAM
        CAN_IF1CMD_SHADOW.bit.MSG_NUM = objID;
        CanaRegs.CAN_IF1CMD.all = CAN_IF1CMD_SHADOW.all;
    }
    else
    {
        /// Use Shadow variable for IF1CMD. IF1CMD should be written to in single 32-bit write.
        union CAN_IF2CMD_REG CAN_IF2CMD_SHADOW;
        /// Wait for busy bit to clear.
        while(CanaRegs.CAN_IF2CMD.bit.Busy)
        {
        }
        /// Clear and Write out the registers to program the message object.
        CAN_IF2CMD_SHADOW.all = 0;
        CanaRegs.CAN_IF2MSK.all = 0;
        CanaRegs.CAN_IF2ARB.all = 0;
        CanaRegs.CAN_IF2MCTL.all = 0;

        /// Set the Control, Mask, and Arb bit so that they get transferred to the message object.
        /// The message control bits will be transferred from the IF1 register set to the message object.
        CAN_IF2CMD_SHADOW.bit.Control = 1;
        /// The arbitration bits will be transferred from the IF1 register set to the message object.
        CAN_IF2CMD_SHADOW.bit.Arb = 1;
        /// The mask bits (Identifier mask + Mdir + MXtd) will be transferred from the IF1 register to the message object.
        CAN_IF2CMD_SHADOW.bit.Mask = 1;
        /// Transfer direction is transferred to the message object : read
        CAN_IF2CMD_SHADOW.bit.DIR = 0;

        /// Receive direction
        CanaRegs.CAN_IF2ARB.bit.Dir = 0;
        /// Set Message ID.
        CanaRegs.CAN_IF2ARB.bit.ID = (msgID << 18);
        /// Mail box is enabled.
        CanaRegs.CAN_IF2ARB.bit.MsgVal = 1;

        /// Set the data length since this is set for all transfers. This is also a single transfer and not a FIFO transfer so set EOB bit.
        /// Data frame has 8 data bytes
        CanaRegs.CAN_IF2MCTL.bit.DLC = 9;
        /// The message object is a single message object or the last message object in a FIFO buffer.
        CanaRegs.CAN_IF2MCTL.bit.EoB = 1;

        /// Transfer data to message object RAM
        CAN_IF2CMD_SHADOW.bit.MSG_NUM = objID;
        CanaRegs.CAN_IF2CMD.all = CAN_IF2CMD_SHADOW.all;
    }
}

void send_CAN_message()
{
    // Use Shadow variable for IF1CMD. IF1CMD should be written to in single 32-bit write.
    union CAN_IF1CMD_REG CAN_IF1CMD_SHADOW;

    // Wait for busy bit to clear.
    while(CanaRegs.CAN_IF1CMD.bit.Busy)
    {
    }

    CanaRegs.CAN_IF1DATA.bit.Data_0 = 0x1;
    CanaRegs.CAN_IF1DATA.bit.Data_1 = 0x2;
    CanaRegs.CAN_IF1DATA.bit.Data_2 = 0x3;
    CanaRegs.CAN_IF1DATA.bit.Data_3 = 0x4;
    CanaRegs.CAN_IF1DATB.bit.Data_4 = 0x5;
    CanaRegs.CAN_IF1DATB.bit.Data_5 = 0x6;
    CanaRegs.CAN_IF1DATB.bit.Data_6 = 0x7;
    CanaRegs.CAN_IF1DATB.bit.Data_7 = 0x8;

    // Set Direction to write and set DATA-A/DATA-B to be transfered to message object
    CAN_IF1CMD_SHADOW.all = 0;
    CAN_IF1CMD_SHADOW.bit.DIR = 1;
    CAN_IF1CMD_SHADOW.bit.DATA_A = 1;
    CAN_IF1CMD_SHADOW.bit.DATA_B = 1;

    // Set Tx Request Bit
    CAN_IF1CMD_SHADOW.bit.TXRQST = 1;

    // Transfer the message object to the message object specified by objID.
    CAN_IF1CMD_SHADOW.bit.MSG_NUM = 1;//obj id;
    CanaRegs.CAN_IF1CMD.all = CAN_IF1CMD_SHADOW.all;
}

void receive_CAN_message()
{
    //CanaRegs.CAN_IF2CMD.bit.Arb = 1;
    CanaRegs.CAN_IF2CMD.all = 0;
    CanaRegs.CAN_IF2CMD.bit.Control = 1;
    CanaRegs.CAN_IF2CMD.bit.DATA_A = 1;
    CanaRegs.CAN_IF2CMD.bit.DATA_B = 1;
    /// Obj ID
    CanaRegs.CAN_IF2CMD.bit.MSG_NUM = 2;

    // Wait for busy bit to clear.
    while(CanaRegs.CAN_IF2CMD.bit.Busy)
    {
    }

    if(CanaRegs.CAN_IF2MCTL.bit.NewDat == 1)
    {
        rx_data[0] = CanaRegs.CAN_IF2DATA.bit.Data_0;
        rx_data[1] = CanaRegs.CAN_IF2DATA.bit.Data_1;
        rx_data[2] = CanaRegs.CAN_IF2DATA.bit.Data_2;
        rx_data[3] = CanaRegs.CAN_IF2DATA.bit.Data_3;
        rx_data[4] = CanaRegs.CAN_IF2DATB.bit.Data_4;
        rx_data[5] = CanaRegs.CAN_IF2DATB.bit.Data_5;
        rx_data[6] = CanaRegs.CAN_IF2DATB.bit.Data_6;
        rx_data[7] = CanaRegs.CAN_IF2DATB.bit.Data_7;
    }
    CanaRegs.CAN_IF2CMD.bit.TxRqst = 1;
    // Transfer the message object to the message object IF register.
    //CanaRegs.CAN_IF2CMD.bit.MSG_NUM = 2;
}