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器件型号：TMS320F280025C 各位专家、您好！
我需要您的帮助^对于我的程序、我想配置我目前开发第一个节点的电路板和第二个节点的具有峰值 CAN 探针的 PC 的 CAN 通信。
此时我想发送一个对象并接收第二个对象 、但接下来我需要配置更多对象。 传输很好、我看到我的帧从板到 PC、但 Opposit 在 CAN_IF2DATA / CAN_IF2DATB 中不起作用 、我从未看到数据。
我正在尝试在传入 ID 上设置一个筛选器、我只想接受我从 PC 发送的 ID、在这种情况下、ID = 0x010为标准格式。
我在您的文档和论坛上做了大量研究、但没有成功。 我尝试通过不加掩码而不成功地在 ID 上进行配置、因此我不确定问题是否来自 ID 的筛选(以查看我是否没有犯错)
因此我配置：
CANARegs.CAN_IF2MSK.bit.MSK = 0x1FFFFFFF；
CanaRegs.CAN_IF2ARB.bit.ID =(msgid << 18)；
CANaRegs.CAN_IF2CMD.bit.DIR = 0；
CANaRegs.CAN_IF2ARB.bit.Dir = 0；
这行是正确的？ 对我来说是的，但是……
您可以看到屏幕截图和我的代码：
void can_init(void)
{
EALLOW;
/// Configure CANA_RX
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1; /// Disable the pullup on GPIO3
GpioCtrlRegs.GPAGMUX1.bit.GPIO3 = 3; /// To define mux position, mux position equal GPAGMUX(2bits) - GPAMUX(2bits) 0 to 15 number, here mux position equal 14 so GPAGMUX1 = 11b and GPAMUX1 = 10b.
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2; /// GPIO3 = CANA_RX, see pin attributes documentation for mux position.
GpioCtrlRegs.GPADIR.bit.GPIO3 = 0; /// GPIO3 = input
GpioCtrlRegs.GPAINV.bit.GPIO3 = 0; /// Not inverted GPIO input
/// Configure CANA_TX
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; /// Disable the pullup on GPIO2
GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; /// GPIO2 = output
GpioCtrlRegs.GPAODR.bit.GPIO2 = 0; /// Normal output not open drain
GpioCtrlRegs.GPAQSEL1.bit.GPIO2 = 0; /// Synchronous
GpioCtrlRegs.GPAGMUX1.bit.GPIO2 = 3; /// To define mux position, mux position equal GPBGMUX(2bits) - GPBMUX(2bits) 0 to 15 number, here mux position equal 14 so GPAGMUX1 = 11b and GPAMUX1 = 10b.
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 2; /// GPIO2 = CANA_TX, see pin attributes documentation for mux position.
/// Place CAN controller in init state, regardless of previous state.
/// This will put controller in idle, and allow the message object RAM to be programmed.
/// CAN module ignore bus activity during configuration.
CanaRegs.CAN_CTL.bit.Init = 1;
/// CAN software reset.
CanaRegs.CAN_CTL.bit.SWR = 1;
/// The CPU has write access to the configuration register.
CanaRegs.CAN_CTL.bit.CCE = 1;
/// Clock and timing bit configuration
ClkCfgRegs.CLKSRCCTL2.bit.CANABCLKSEL = 0;
/// Set up the bit rate for the CAN bus, with 250kbit/s.
/// Bit time (Tq) = 8
/// Bit clock prescaler = 49dec = 0x31
/// Propagation segment (Tq) = 1
/// Phase segment 1 (Tq) = 3dec = 0x3
/// Phase segment 2 (Tq) = 2dec = 0x2
/// Synchronization jump width (Tq) = 2dec = 0x2
/// Sampling point = 62.5%
/// Oscillator tolerance = 1.48%
/// Set Baud rate prescaler.
CanaRegs.CAN_BTR.bit.BRP = 0x31;
/// Synchronization jump width.
CanaRegs.CAN_BTR.bit.SJW = 0x2;
/// Time segment before the sample point.
CanaRegs.CAN_BTR.bit.TSEG1 = 0x3;
/// Time segment after the sample point.
CanaRegs.CAN_BTR.bit.TSEG2 = 0x2;
/// CAN module processes messages normally
CanaRegs.CAN_CTL.bit.Init = 0;
//setupMessageObject(1, 0x100, MSG_OBJ_TYPE_TRANSMIT);
setupMessageObject(2, 0x010, MSG_OBJ_TYPE_RECEIVE);
EDIS;
}
...
/// Receive message
else
{
/// Wait for busy bit to clear.
while(CanaRegs.CAN_IF2CMD.bit.Busy)
{
}
/// Clear and Write out the registers to program the message object.
CanaRegs.CAN_IF2CMD.all = 0;
CanaRegs.CAN_IF2MSK.all = 0;
CanaRegs.CAN_IF2ARB.all = 0;
CanaRegs.CAN_IF2MCTL.all = 0;
/// Use mask (Msk, MXtd and Mdir) for acceptance filtering.
CanaRegs.CAN_IF2MCTL.bit.UMask = 1;
/// Set the data length since this is set for all transfers. This is also a single transfer and not a FIFO transfer so set EOB bit.
/// Data frame has 8 data bytes
CanaRegs.CAN_IF2MCTL.bit.DLC = 9;
/// The message object is a single message object or the last message object in a FIFO buffer.
CanaRegs.CAN_IF2MCTL.bit.EoB = 1;
/// Extended identifier bit has no effect on the acceptance filtering (standard mode is used).
CanaRegs.CAN_IF2MSK.bit.MXtd = 0;
/// The message direction bit has no effect on the acceptance filtering.
CanaRegs.CAN_IF2MSK.bit.MDir = 0;
/// The corresponding bit in the identifier of the message object is used for acceptance filtering.
CanaRegs.CAN_IF2MSK.bit.Msk = 0x1FFFFFFF;
/// IF command registers configure and initiate the transfer between the IF register sets and the message RAM.
/// Set the Control, Mask, and Arb bit so that they get transferred to the message object.
/// The message control bits will be transferred from the IF2 register set to the message object.
CanaRegs.CAN_IF2CMD.bit.Control = 1;
/// The arbitration bits will be transferred from the IF2 register set to the message object.
CanaRegs.CAN_IF2CMD.bit.Arb = 1;
/// The mask bits (Identifier mask + Mdir + MXtd) will be transferred from the IF2 register to the message object.
CanaRegs.CAN_IF2CMD.bit.Mask = 1;
/// Read message object (mail box).
CanaRegs.CAN_IF2CMD.bit.DIR = 0;
/// Transfer data to message object RAM
CanaRegs.CAN_IF2CMD.bit.MSG_NUM = objID;
/// Arbitration
/// Transmit direction = receive, a remote frame with the identifier of this message object is transmitted.
CanaRegs.CAN_IF2ARB.bit.Dir = 0;
/// Set Message ID.
CanaRegs.CAN_IF2ARB.bit.ID = (msgID << 18);
/// Standard identifier is used for this message object.
CanaRegs.CAN_IF2ARB.bit.Xtd = 0;
/// Mail box is enabled after mask configuration.
CanaRegs.CAN_IF2ARB.bit.MsgVal = 1;
}
}
Read data function
bool receive_CAN_message()
{
bool status;
/// Detect for mail box number 2 (receive)
//if(CanaRegs.CAN_NDAT_21 == 2)
//{
// Set the Message Data A, Data B to be read on request for data from the message object.
CanaRegs.CAN_IF2CMD.bit.DATA_A = 1;
CanaRegs.CAN_IF2CMD.bit.DATA_B = 1;
// Wait for busy bit to clear.
while(CanaRegs.CAN_IF2CMD.bit.Busy)
{
}
// Read out the data from the CAN registers.
uint16_t index;
for(index = 0; index < 8; index++)
{
switch(index)
{
case 0:
rx_data[index] = CanaRegs.CAN_IF2DATA.bit.Data_0;
break;
case 1:
rx_data[index] = CanaRegs.CAN_IF2DATA.bit.Data_1;
break;
case 2:
rx_data[index] = CanaRegs.CAN_IF2DATA.bit.Data_2;
break;
case 3:
rx_data[index] = CanaRegs.CAN_IF2DATA.bit.Data_3;
break;
case 4:
rx_data[index] = CanaRegs.CAN_IF2DATB.bit.Data_4;
break;
case 5:
rx_data[index] = CanaRegs.CAN_IF2DATB.bit.Data_5;
break;
case 6:
rx_data[index] = CanaRegs.CAN_IF2DATB.bit.Data_6;
break;
case 7:
rx_data[index] = CanaRegs.CAN_IF2DATB.bit.Data_7;
break;
}
}
status = true;
/*}
else
{
status = false;
}*/
// Clear New Data Flag
CanaRegs.CAN_IF2CMD.bit.TxRqst = 1;
return(status);
}
谢谢
Damien
